L6918A STMicroelectronics, L6918A Datasheet
L6918A
Related parts for L6918A
L6918A Summary of contents
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... PGNDS1 14 October 2002 ORDERING NUMBERS: L6918D, L6918AD DESCRIPTION L6918A is a master device that it has to be combined with the L6918,slave, realizing a 4-phases topology, interleaved. The device kit is specifically designed to provide a high performance/high density DC/DC con- version for high current microprocessors and distrib- uted power. Each device implements a dual-phase step-down controller with a 180° ...
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... L6918 L6918A L6918A (MASTER) DEVICE BLOCK DIAGRAM SYNC_ OUT SYNC_ OUT SYNCH. SYNCH. SLAVE_OK SLAVE_OK CIRCUITRY CIRCUITRY PGOOD PGOOD DIGITAL DIGITAL SOFT- STAR T SOFT- STAR T VID4 VID4 VID3 VID3 DAC DAC VID2 VID2 VID1 VID1 VID0 VID0 VSEN VSEN L6918 (SLAVE) DEVICE BLOCK DIAGRAM ...
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... Maximum junction temperature max T Storage temperature range storage T Junction Temperature Range j P Max power dissipation at Tamb=25 C MAX L6918A (MASTER) PIN FUNCTION N. Name 1 LGATE1 Channel 1 low side gate driver output. 2 VCCDR LS Mosfet driver supply 12V buses can be used. 3 PHASE1 This pin is connected to the Source of the upper mosfet and provides the return path for the high side driver of channel 1 ...
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... L6918 L6918A L6918A (MASTER) PIN FUNCTION (continued) N. Name 13 ISEN1 Channel 1 current sense pin. The output current may be sensed across a sense resistor or across the low-side mosfet RdsON. This pin has to be connected to the low-side mosfet drain or to the sense resistor through a resistor Rg in order to program the current intervention for ...
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... Channel 2 Power Ground sense pin. The net connecting the pin to the sense point must be routed as close as possible to the ISEN2 net in order to couple in common mode any picked-up noise. Description This pin has to be connected to the low-side mosfet drain or ON -------------------------- O CPx R s ens e L6918 L6918A between this FB 5/35 ...
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... L6918 L6918A L6918 (SLAVE) PIN FUNCTION (continued) N. Name 16 ISEN2 Channel 2 current sense pin. The output current may be sensed across a sense resistor or across the low-side mosfet Rds to the sense resistor through a resistor Rg in order to program the current intervention for each phase at 140% as follow: Where the current offset information relative to the Over Current condition (offset at OC threshold minus offset at zero load) ...
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... OSCILLATOR AND INHIBIT f Initial Accuracy OSC f Total Accuracy OSC,Rosc Vosc Ramp Amplitude d Maximum duty cycle MAX INH Inhibit threshold REFERENCE AND DAC only for L6918A (MASTER) V Reference Voltage PROG_OUT Accuracy I VID pull-up Current DAC VID pull-up Voltage ERROR AMPLIFIER DC Gain SR Slew-Rate Offset ...
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... VPROG_IN) SEN PGOOD Lower Threshold (V / VPROG_IN) SEN OVP Over Voltage Threshold (V / VPROG_IN) SEN UVP Under Voltage Trip (V / VPROG_IN) SEN V PGOOD Voltage Low PGOOD Table 1. VID Settings (only for L6918A) VID4 VID3 VID2 VID1 ...
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... FBR 11 12 FBG 19 SYNC/ADJ 28 PGND Rg Rg L6918 14 15 PGNDS1 PGNDS2 Slave ISEN1 ISEN2 1 27 LGATE1 LGATE2 3 26 PHASE1 PHASE2 4 25 UGATE1 UGATE2 5 24 BOOT1 BOOT2 2 6 VCCDR VCC L6918 L6918A C IN HS2 L2 LS2 C OUT R F LS4 L4 HS4 CPU PGOOD 9/35 ...
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... VID 9.0 Master and slave devices are connected together in order to realize four-phase high performance step-down DC/DC converter. Four-phase converter is implemented using L6918A master and one L6918 slave devices as shown in figure 1. A communication bus is implemented among all the controllers involved in the regulation. This bus consists in the following lines: – ...
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... Figure 2 shows the frequency variation vs. the oscillator resistor ROSC considering the above reported relation- ships. 1.237 KHz f 300kHz ----------------------------- ----------- - 1.237 KHz – 300kHz + ----------------------------- 12 ----------- - L6918 L6918A ) connected be- OSC 6 14.82 10 300KHz = + ----------------------------- 12.918 10 = 300KHz – ------------------------------- - OSC 11/35 ...
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... Frequency (KHz) DIGITAL TO ANALOG CONVERTER (ONLY FOR MASTER DEVICE L6918A) The built-in digital to analog converter allows the adjustment of the output voltage from 1.100V to 1.850V with 25mV as shown in the previous table 1. The internal reference is trimmed to ensure the precision of ±0.6% and a zero temperature coefficient around the 70° C. The internal reference voltage for the regulation is programmed by the voltage identification (VID) pins ...
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... The peak current is shown for both the upper and the lower driver of the two phases in figure 4.A 10nF capacitive load has been used. For the upper drivers, the source current is 1.9A while the sink current is 1.5A with V ilarly, for the lower drivers, the source current is 2.4A while the sink current is 2A with V L6918 L6918A -V = 12V; sim- BOOT PHASE = 12V ...
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... L6918 L6918A Figure 4. Drivers peak current: High Side (left) and Low Side (right) CH3 = HGATE1; CH4 = HGATE2 CURRENT READING AND OVER CURRENT Each device involved in the four phase conversion has its own current reading circuitry and over current protec- tion results, the OCP network design for each device must be performed fort half of the maximum output current ...
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... I AVG INFO1 INFO2 ) for each phase, which has to be placed at one OCPx OCPx I = ------------------------- - R = ----------------------------------------- - OCPx NSE L6918 L6918A LGATEX Rg ISENX I ISENx Rg PGNDSX then compared to I INFOX = 35 A). Accord- NFOx R SENSE 35 A imposed by the ON bottom. The worst-case condition is when ...
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... L6918 L6918A Figure 6. Constant Current operation TonMAX It can be observed that the peak current (Ipeak) is greater than the 140% but it can be determined as follow: Ipeak I = OCPx Where Vout is the minimum output voltage (UVP threshold). MIN The device works in Constant-Current, and the output voltage decreases as the load increase, until the output voltage reaches the under-voltage threshold (Vout off, the FAULT pin is driven high and the device stops working ...
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... V DROOP DROOP COMP COMP FB FB Total Current Info (I Total Current Info (I Ref Ref = L6918 L6918A R SENSE --------------------- - I OUT Rg divided by the number of LOAD ENSE L OAD VID R = – --------------------- - --------------- still the output current of OUT divided by 2. ...
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... L6918 L6918A Droop function is provided only for positive load; if negative load is applied, and then IINFOx<0, no current is sunk from the FB pin. The device regulates at the voltage programmed by the VID. OUTPUT VOLTAGE MONITORING AND PROTECTION: POWER GOOD The output voltage is monitored by the Slave device through the pin VSEN not within +12/-10% (typ.) of the programmed value, the PGOOD output is forced low ...
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... The output voltage has a first drop due to the current variation inside the capacitor (neglecting the effect of the ESL ESR RMS Single Phase 0.50 Dual Phase 0.25 4 Phase 0.25 0.50 0.75 Duty Cycle ( OUT ESR OUT OUT L6918 L6918A 19/35 ...
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... L6918 L6918A A minimum capacitor value is required to sustain the current during the load transient without discharge it. The voltage drop due to the output capacitor discharge is given by the following equation: Where D is the maximum duty cycle value. The lower is the ESR, the lower is the output drop during load MAX transient and the lower is the output voltage static ripple ...
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... CURRENT SHARING DUTY CYCLE I INFO1 1/5 CORRECTION PWM2 ERROR REFERENCE AMPLIFIER PROGRAMMED + BY VID 4/5 - COMP F(S) FB D02IN1392 ) is internally built; the error between the read current and this reference AVG I 2mV REA D ------------------- - = -------------------------------------- - MAX S ENSE MAX L6918 L6918A MAX/2 21/35 ...
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... L6918 L6918A Figure 13. Current Sharing Control Loop. COMP The current sharing between devices uses the droop function. Each device can be modeled with its Thevenin equivalent circuit (that is an ideal voltage source equal to the programmed voltage by VIDs and its related output resistance R ...
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... ------------------ - -------------- - ------------------------------------------------------------------------------------------------------------------------------- -- - series network is considered for the L6918 L6918A sourced by the ----------- - the oscillator ramp amplitude osc ------- - + -------------- - // ...
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... L6918 L6918A while placing the zero in correspondence with the L-C resonance a simple -20dB/dec shape of the gain is as- sured (See Figure 15). In fact, considering the usual value for the output filter, the LC resonance results frequency lower than the above reported zero. Figure 15. ACM Control Loop Gain Block Diagram (left) and Bode Diagram (right). ...
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... gate HGATEx PHASEx gate C LGATEx IN PGNDx a. PCB power and ground planes areas V IN BOOTx C HS BOOTx PHASEx VCC SGND L6918 L6918A C OUT LOAD C OUT LOAD 25/35 ...
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... L6918 L6918A Figure 17. Device orientation (left) and sense nets routing (right). Towards HS mosfet Towards HS mosfet Gate resistors of few ohms help in reducing the power dissipated by the IC without compromising the system efficiency. The placement of other components is also important: – The bootstrap capacitor must be placed as close as possible to the BOOTx and PHASEx pins to min- imize the loop that is created. – ...
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... The input can be configured in different ways using the jumpers JP1, JP2 and JP6; these jumpers control also the mosfet driver supply voltage. Anyway, power conversion starts from V (See Figure 20). CORRECT To PHASE connection 2 PACK mosfets for the low side switch in order and the device is supplied from V IN L6918 L6918A To LS Drain and Source To HS Gate and Source CC 27/35 ...
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... L6918 L6918A Figure 19. Demo Board Schematic Vin JP6 DZ1 GNDin JP1 Vcc C29 D10 GNDcc C27 Q5a R37 To L6918A R23 Pin 6 R36 To L6918 R2 Pin 6 To Slave’s PGOOD Q1a 28/35 JP2 R30 R16 VCCDR VCC 2 6 C31 ...
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... JP2 JP1 ( 12V VCCDR = V CC BOOTx DZ1 JP6 JP2 JP1 ( VCCDR = 12V BOOTx L6918 L6918A = V = 12V) and Double Supply ( Vcc = 12V HS Drains = 5V HS Supply = 5V VCCDR (LS Supply Vcc = 12V HS Drains = 5V HS Supply = 12V VCCDR (LS Supply) = 12V ...
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... L6918 L6918A Figure 22. Jumpers configuration: Single Supply Vin = 12V GNDin Vcc = Open GNDcc Vin = 12V GNDin Vcc = Open GNDcc PCB AND COMPONENT LAYOUT Figure 23. PCB and Components Layouts (Dimensions: 10.8mm x 14.5mm) Component Side Internal SGND Plane 30/35 DZ1 6.8V JP6 JP2 JP1 VCCDR (LS Supply) = 12V ...
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... ESR) has been used implementing a resulting ESR of = 62mV after a 52A load transient 20k 2 = ------------------- - R ESR DROOP 3300 ------ - 2 = ------------------- - = ---------------------------------------- - F R 3.9k F L6918 L6918A max at 25°C that (R3 to R6; R24 to R27) has to be: FB (R7) 1 ------------ - = 6.2A (L1, L2) 200k 1 ---------------------------------------------------------- = 4.5m 2 ------------- 1k + 1.2m 2 (C2) (R8) 3.9k 31/35 ...
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... L6918 L6918A Part List Resistors R2, R9, R20, R23, R31, R42 R3, R4, R5, R6 R24, R25, R26, R27 R7, R28 R11, R22 R12 to R19 R32, R33, R34, R35, R38, R39 R8, R29 R10, R30 R21 R36, R37 Capacitors C1, C48 C2, C25 C24, C30 C3, C4, C26, C27 ...
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... Additional output capacitors can help in reducing the initial voltage spike mainly due to the ESR. Figure 26. 110A Load Transient Response Output Current [A] 1.470 1.450 1.430 1.410 1.390 1.370 1.350 L6918 L6918A 80 90 100 110 100 110 Output Current [A] 33/35 ...
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... L6918 L6918A mm DIM. MIN. TYP. MAX. A 2.65 a1 0.1 0.3 0.004 b 0.35 0.49 0.014 b1 0.23 0.32 0.009 C 0 (typ.) D 17.7 18.1 0.697 E 10 10.65 0.394 e 1.27 e3 16.51 F 7.4 7.6 0.291 L 0.4 1.27 0.016 S 8 (max.) 34/35 inch MIN. TYP. MAX. 0.104 0.012 0.019 0.013 0.020 0.713 0.419 0.050 0.65 0.299 0.050 OUTLINE AND MECHANICAL DATA SO28 ...
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... L6918 L6918A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...