XR16C2450IJ EXAR [Exar Corporation], XR16C2450IJ Datasheet - Page 16

• Manufacturer Part Number: XR16C2450IJ
• Description: 2.97V TO 5.5V DUART
• Manufacturer: EXAR [Exar Corporation]

XR16C2450
2.97V TO 5.5V DUART
LCR[2]: TX and RX Stop-bit Length Select
The length of stop bit is specified by this bit in conjunction with the programmed word length.
LCR[3]: TX and RX Parity Select
Parity or no parity can be selected via this bit. The parity bit is a simple way used in communications for data
integrity check. See
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LCR[4]: TX and RX Parity Select
If the parity bit is enabled with LCR bit-3 set to a logic 1, LCR BIT-4 selects the even or odd parity format.
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•
LCR[5]: TX and RX Parity Select
If the parity bit is enabled, LCR BIT-5 selects the forced parity format.
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LCR[6]: Transmit Break Enable
When enabled, the Break control bit causes a break condition to be transmitted (the TX output is forced to a
“space’, logic 0, state). This condition remains, until disabled by setting LCR bit-6 to a logic 0.
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Logic 0 = No parity.
Logic 1 = A parity bit is generated during the transmission while the receiver checks for parity error of the
data character received.
Logic 0 = ODD Parity is generated by forcing an odd number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format (default).
Logic 1 = EVEN Parity is generated by forcing an even number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format.
LCR[5] = logic 0, parity is not forced (default).
LCR[5] = logic 1 and LCR[4] = logic 0, parity bit is forced to a logical 1 for the transmit and receive data.
LCR[5] = logic 1 and LCR[4] = logic 1, parity bit is forced to a logical 0 for the transmit and receive data.
Logic 0 = No TX break condition (default).
Logic 1 = Forces the transmitter output (TX) to a “space”, logic 0, for alerting the remote receiver of a line
break condition.
Table 7
BIT-2
LCR B
0
1
1
X
0
0
1
1
for parity selection summary below.
IT
-5 LCR B
W
X
0
1
0
1
ORD LENGTH
5,6,7,8
IT
6,7,8
-4 LCR B
T
5
ABLE
7: P
0
1
1
1
1
IT
ARITY SELECTION
-3
16
S
Forced parity to space, “0”
TOP BIT LENGTH
Force parity to mark, “1”
P
ARITY SELECTION
Even parity
Odd parity
No parity
1 (default)
1-1/2
2
(B
IT TIME
(
S
))
xr
REV. 1.0.0