XR16C2450IJ EXAR [Exar Corporation], XR16C2450IJ Datasheet
XR16C2450IJ
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XR16C2450IJ Summary of contents
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DECEMBER 2004 GENERAL DESCRIPTION The XR16C2450 (2450 dual universal asynchro- nous receiver and transmitter XR16C2450 is an improved XR16C2450 with lower operating voltage and 5 volt tolerant inputs. The 2450 provides enhanced UART functions, a modem control ...
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... D7 9 RXB 10 11 RXA XR16C2450 NC 12 44-pin PLCC TXA 13 TXB 14 OP2B# 15 CSA# 16 CSB# 17 ORDERING INFORMATION ART UMBER ACKAGE XR16C2450IP 40-Lead PDIP XR16C2450IJ 44-Lead PLCC XR16C2450IM 48-Lead TQFP 36 RESET 35 DTRB# 34 DTRA# RTSA# 33 OP2A INTA 30 29 INTB ...
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REV. 1.0.0 PIN DESCRIPTIONS Pin Description 40-PDIP 44-PLCC N AME DATA BUS INTERFACE ...
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XR16C2450 2.97V TO 5.5V DUART Pin Description 40-PDIP 44-PLCC N AME RTSA CTSA DTRA DSRA CDA RIA OP2A TXB 12 ...
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REV. 1.0.0 Pin Description 40-PDIP 44-PLCC N AME RIB OP2B ANCILLARY SIGNALS XTAL1 16 18 XTAL2 17 19 RESET 35 39 VCC 40 44 GND 20 22 N.C. - ...
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XR16C2450 2.97V TO 5.5V DUART 1.0 PRODUCT DESCRIPTION The XR16C2450 (2450) integrates the functions of two 16C450 Universal Asynchrounous Receiver and Transmitter (UART). Each UART is independently controlled having its own set of device configuration registers. The 2450 provides serial ...
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REV. 1.0.0 2.3 Channel A and B Selection The UART provides the user with the capability to bi-directionally transfer information between an external CPU and an external serial communication device. A logic 0 on chip select pins, CSA# or ...
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XR16C2450 2.97V TO 5.5V DUART F The on-chip oscillator is designed to use an industry standard microprocessor crystal (parallel resonant, fundamental frequency with 10-22 pF capacitance load, ESR of 20-120 ohms and 100 ppm frequency tolerance) connected externally between the ...
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REV. 1.0 ABLE YPICAL DATA RATES WITH A O Data Rate D 16x UTPUT IVISOR FOR MCR Bit-7=0 Clock (Decimal) 400 2304 2400 384 4800 192 9600 96 19.2k 48 38.4k 24 76.8k 12 153.6k 6 ...
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XR16C2450 2.97V TO 5.5V DUART 2.9 Receiver The receiver section contains an 8-bit Receive Shift Register (RSR) and 1 byte FIFO or Receive Holding Register (RHR). The RSR uses the 16X clock for timing. It verifies and validates every bit ...
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REV. 1.0.0 2.10 Internal Loopback The 2450 UART provides an internal loopback capability for system diagnostic purposes. The internal loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally. Figure 7 ...
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XR16C2450 2.97V TO 5.5V DUART 3.0 UART INTERNAL REGISTERS Each of the UART channel in the 2450 has its own set of configuration registers selected by address lines A0, A1 and A2 with CSA# or CSB# selecting the channel. The ...
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REV. 1.0 ABLE DDRESS EG EAD A2- AME RITE RHR RD Bit THR WR Bit IER RD/ ...
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XR16C2450 2.97V TO 5.5V DUART 4.3.1 Interrupt Mode Operation When the receive interrupt (IER BIT enabled, the RHR interrupt (see ISR bit-2) status will reflect the following: A. The receive data available interrupts are issued to the ...
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REV. 1.0.0 4.4.1 Interrupt Generation: • LSR is by any of the LSR bits and 4. • RXRDY is by data byte received in RHR. • TXRDY is by THR empty. • MSR is by any ...
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XR16C2450 2.97V TO 5.5V DUART LCR[2]: TX and RX Stop-bit Length Select The length of stop bit is specified by this bit in conjunction with the programmed word length. BIT LCR[3]: TX and RX Parity Select Parity ...
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REV. 1.0.0 LCR[7]: Baud Rate Divisors (DLL/DLM) Enable • Logic 0 = Data registers are selected (default). • Logic 1 = Divisor latch registers are selected. 4.6 Modem Control Register (MCR) or General Purpose Outputs Control - Read/Write The ...
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XR16C2450 2.97V TO 5.5V DUART LSR[2]: Receive Data Parity Error Flag • Logic parity error (default). • Logic 1 = Parity error. The receive character in RHR does not have correct parity information and is suspect. This ...
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REV. 1.0.0 MSR[3]: Delta CD# Input Flag • Logic change on CD# input (default). • Logic 1 = Indicates that the CD# input has changed state since the last time it was monitored. A modem status ...
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XR16C2450 2.97V TO 5.5V DUART T 8: UART RESET CONDITIONS FOR CHANNEL A AND B ABLE REGISTERS DLM DLL RHR THR IER ISR LCR MCR LSR MSR SPR I/O SIGNALS TX OP2# RTS# DTR# INT RESET STATE Bits 7-0 = ...
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REV. 1.0.0 ABSOLUTE MAXIMUM RATINGS Power Supply Range Voltage at Any Pin Operating Temperature Storage Temperature Package Dissipation TYPICAL PACKAGE THERMAL RESISTANCE DATA Thermal Resistance (48-TQFP) Thermal Resistance (44-PLCC) Thermal Resistance (40-PDIP) ELECTRICAL CHARACTERISTICS DC ELECTRICAL CHARACTERISTICS U : ...
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XR16C2450 2.97V TO 5.5V DUART AC ELECTRICAL CHARACTERISTICS U : TA=-40 NLESS OTHERWISE NOTED S YMBOL - Crystal Frequency CLK External Clock Low/High Time OSC External Clock Frequency T Address Setup Time AS T Address Hold Time AH T Chip ...
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REV. 1.0 IGURE LOCK IMING CLK EXTERNAL CLOCK IGURE ODEM NPUT UTPUT IOW # Active RTS# Change of state DTR# CD# CTS# DSR# INT IOR# RI# CLK OSC F ...
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XR16C2450 2.97V TO 5.5V DUART F 10 IGURE ATA US EAD IMING A0-A2 Valid Address T AS CSA#/ CSB# IOR# T RDV D0- IGURE ATA US RITE IMING A0-A2 Valid ...
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REV. 1.0 IGURE NTERRUPT IMING FOR RX Start D0:D7 Bit INT IOR# (Reading data out of RHR IGURE NTERRUPT IMING FOR TX Start (Unloading) D0:D7 Bit T INT IER[1] enabled INT* ...
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XR16C2450 2.97V TO 5.5V DUART PACKAGE DIMENSIONS (48 PIN TQFP - Seating Plane Note: The control dimension is the millimeter column SYMBOL α ...
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REV. 1.0.0 PACKAGE DIMENSIONS (44 PIN PLCC Note: The control dimension is the millimeter column SYMBOL ...
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XR16C2450 2.97V TO 5.5V DUART PACKAGE DIMENSIONS (40 PIN PDIP Seating Plane L B Note: The control dimension is the millimeter column SYMBOL α ...
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REV. 1.0.0 REVISION HISTORY D R ATE EVISION December 2004 1.0.0 Initial Datasheet. This datasheet applies to devices with top mark date code of "B2 YYWW" and newer. EXAR Corporation reserves the right to make changes to the products ...
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XR16C2450 REV. 1.0.0 GENERAL DESCRIPTION .................................................................................................1 A ................................................................................................................................................1 PPLICATIONS F .....................................................................................................................................................1 EATURES F 1. XR16C2450 B D IGURE LOCK IAGRAM ..................................................................................................................................................... 2 IGURE IN UT SSIGNMENT .................................................................................................................................2 ORDERING INFORMATION PIN DESCRIPTIONS .........................................................................................................3 1.0 PRODUCT DESCRIPTION ...
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TO 5.5V DUART F 11 IGURE ATA US RITE IMING F 10 .............................................................................................................................................. 24 IGURE ATA US EAD IMING F 12 IGURE NTERRUPT IMING FOR F 13. ...