HIP6502BEVAL1 INTERSIL [Intersil Corporation], HIP6502BEVAL1 Datasheet - Page 11

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HIP6502BEVAL1

Manufacturer Part Number
HIP6502BEVAL1
Description
Multiple Linear Power Controller with ACPI Control Interface
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
to the capacitor’s ground pad. Minimize any leakage current
paths from SS node, since the internal current source is only
10 A.
A multi-layer printed circuit board is recommended. Figure 9
shows the connections of most of the components in the
converter. Note that the individual capacitors shown each
could represent numerous physical capacitors. Dedicate one
solid layer for a ground plane and make all critical
component ground connections through vias placed as close
to the component terminal as possible. Dedicate another
solid layer as a power plane and break this plane into
smaller islands of common voltage levels. Ideally, the power
plane should support both the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers to create power islands connecting the filtering
components (output capacitors) and the loads. Use the
remaining printed circuit layers for small signal wiring.
Component Selection Guidelines
Output Capacitors Selection
The output capacitors for all outputs should be selected to
allow the output voltage to meet the dynamic regulation
requirements of active state operation (S0, S1). The load
transient for the various microprocessor system’s
components may require high quality capacitors to supply
C
C
C
V
HF4
BULK4
+12V
HF1
OUT1
+5V
Q3
V
C
FIGURE 9. PRINTED CIRCUIT BOARD ISLANDS
SB
OUT3
IN
HF3
Q2
C
BULK1
C
KEY
C
BULK3
SS
Q6
ISLAND ON CIRCUIT/POWER PLANE LAYER
VIA CONNECTION TO GROUND PLANE
ISLAND ON POWER PLANE LAYER
C
12V
VSEN1
SS
3V3DLSB
3V3DL
VCLK
12V
3V3
HIP6502B
11
GND
5VSB
5VDLSB
VSEN2
DRV2
5VDL
C
DLA
5VSB
5V
C
BULK5
Q1
C
IN
V
C
OUT2
BULK2
V
Q5
OUT5
C
+5V
+3.3V
HF5
C
IN
HF2
IN
Q4
HIP6502B
the high slew rate (di/dt) current demands. Thus, it is
recommended that the output capacitors be selected for
transient load regulation, paying attention to their parasitic
components (ESR, ESL).
Also, during the transition between active and sleep states,
there is a short interval of time during which none of the
power pass elements are conducting - during this time the
output capacitors have to supply all the output current. The
output voltage drop during this brief period of time can be
easily approximated with the following formula:
ESR
I
C
t
The output voltage drop is heavily dependent on the ESR
(equivalent series resistance) of the output capacitor bank,
the choice of capacitors should be such as to maintain the
output voltage above the lowest allowable regulation level.
V
The output capacitor for the V
loop stability. Figure 10 outlines a capacitance vs. equivalent
series resistance envelope. For stable operation and
optimized performance, select a C
combination of capacitors with characteristics within the
shown envelope.
Input Capacitors Selection
The input capacitors for an HIP6502B application have to
have a sufficiently low ESR as to not allow the input voltage
to dip excessively when energy is transferred to the output
capacitors. If the ATX supply does not meet the
OUT
t
V
V
OUT
CLK
- active-to-sleep or sleep-to-active transition time (10 s typ.)
0.01
OUT
OUT
0.1
10
OUT
1
- output current during transition
10
- output capacitor bank capacitance
(V
- output voltage drop
=
OUT4
- output capacitor bank ESR
I
FIGURE 10. C
OUT
) Output Capacitors Selection
ESR
OUT
OUT4
CAPACITANCE ( F)
+
--------------- -
C
OUTPUT CAPACITOR
CLK
OUT
t
t
100
OUT4
linear regulator provides
, where
capacitor or
1000

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