MC68HC11F1CPU2 FREESCALE [Freescale Semiconductor, Inc], MC68HC11F1CPU2 Datasheet - Page 6

• Manufacturer Part Number: MC68HC11F1CPU2
• Description: MC68HC11F1 Technical Data
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Paragraph
6.2
6.3
6.4
6.5
6.6
6.7
6.8
7.1
7.2
7.3
7.4
7.4.1
7.4.2
7.5
7.6
7.6.1
7.6.2
7.6.3
7.6.4
7.6.5
7.7
7.7.1
8.1
8.2
8.2.1
8.3
8.3.1
8.3.2
8.3.3
8.3.4
8.4
8.5
8.5.1
8.5.2
8.5.3
Port B ........................................................................................................ 6-2
Port C ........................................................................................................ 6-2
Port D ........................................................................................................ 6-3
Port E ........................................................................................................ 6-4
Port F ......................................................................................................... 6-4
Port G ........................................................................................................ 6-5
System Configuration Options 2 ................................................................ 6-5
Data Format .............................................................................................. 7-1
Transmit Operation .................................................................................... 7-1
Receive Operation ..................................................................................... 7-2
Wakeup Feature ........................................................................................ 7-4
SCI Error Detection ................................................................................... 7-5
SCI Registers ............................................................................................ 7-5
Status Flags and Interrupts ..................................................................... 7-10
Functional Description ............................................................................... 8-1
SPI Transfer Formats ................................................................................ 8-2
SPI Signals ................................................................................................ 8-3
SPI System Errors ..................................................................................... 8-4
SPI Registers ............................................................................................ 8-5
Idle-Line Wakeup .............................................................................. 7-4
Address-Mark Wakeup ...................................................................... 7-4
Serial Communications Data Register .............................................. 7-5
Serial Communications Control Register 1 ....................................... 7-5
Serial Communications Control Register 2 ....................................... 7-6
Serial Communication Status Register .............................................. 7-7
Baud Rate Register ........................................................................... 7-8
Receiver Flags ................................................................................ 7-11
Clock Phase and Polarity Controls .................................................... 8-3
Master In Slave Out ........................................................................... 8-4
Master Out Slave In ........................................................................... 8-4
Serial Clock ....................................................................................... 8-4
Slave Select ...................................................................................... 8-4
Serial Peripheral Control ................................................................... 8-5
Serial Peripheral Status ..................................................................... 8-7
Serial Peripheral Data Register ......................................................... 8-7
SECTION 7 SERIAL COMMUNICATIONS INTERFACE
SECTION 8 SERIAL PERIPHERAL INTERFACE
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