DP83256VF-AP NSC [National Semiconductor], DP83256VF-AP Datasheet - Page 66

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DP83256VF-AP

Manufacturer Part Number
DP83256VF-AP
Description
Manufacturer
NSC [National Semiconductor]
Datasheet
D0 –D7
5 0 Registers
5 22 LINK ERROR THRESHOLD REGISTER (LETR)
The Link Error Threshold Register contains the start value for the Link Error Monitor Counter It is an 8-bit down-counter which
decrements if link errors are detected
When the Counter reaches 0 the Link Error Monitor Threshold Register value is loaded into the Link Error Monitor Counter and
the Link Error Monitor Threshold bit (LEMT) of the Interrupt Condition Register (ICR) is set to one
The Link Error Monitor Threshold Register value is also loaded into the Link Error Monitor Counter during every Control Bus
Interface write cycle of LETR
The counter is initialized to 0 during the reset process (i e E RST
ACCESS RULES
Bit
LET7
D7
ADDRESS
LET0–LET7
15h
Symbol
LET6
D6
(Continued)
LINK ERROR THRESHOLD BIT
LET0 is the Least Significant Bit (LSB)
Always
READ
LET5
D5
LET4
D4
WRITE
Always
k
LET3
0–7
D3
66
l
Start value for the Link Error Monitor Counter
e
GND)
Description
LET2
D2
LET1
D1
LET0
D0

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