DP83256VF-AP NSC [National Semiconductor], DP83256VF-AP Datasheet - Page 27

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DP83256VF-AP

Manufacturer Part Number
DP83256VF-AP
Description
Manufacturer
NSC [National Semiconductor]
Datasheet
3 0 Functional Description
3 7 PHY-MAC INTERFACE
NATIONAL BYTE-WIDE CODE
The PLAYER
from its PHY Port Indicate Output to the MAC device Each
National byte-wide code may contain data or control codes
or the line state information of the connection Table 3-7
lists all the possible outputs
During Active Line State all data and control symbols are
being repeated to the PHY Port Indicate Output with the
exception of data in data-control mixture bytes That data
symbol is replaced by zero If only one symbol in a byte is a
control symbol the data symbol will be replaced by 0000
and the whole byte will be presented as control code Note
that the Line State Detector recognizes the incoming data
ALS
ALS
ALS
ALS
ILS
ILS
ILS
ILS
Stuff Byte during ILS
Not ALS and Not ILS
Not ALS and Not ILS
Not ALS and Not ILS
Not ALS and Not ILS
Stuff Byte during Not ALS
EB Overflow Underflow
SMT PI Connection (LSU)
Scrub Symbol Pair
Where
n
C
N
I
M
I
V
LS
u
k
x
Current Line State
e
e
e
e
e
e
e
e
e
e
e
Any data symbol in 0 1 2
Any control symbol in V R S T I H
0000
Idle Symbol
Any symbol that matches the current line state
1011
0011
Line State
ALS
ILS
NSD
MLS
HLS
QLS
NLS
1
0
Don’t care
e
e
e
e
e
e
e
e
e
e
e
e
a
Code for data symbol in a data control mixture byte
First symbols of the byte in Idle Line State
PHY Invalid
000
001
010
100
101
110
111
Indicates symbol received does not match current line state
Indicate symbol received matches current line state
device outputs the National byte-wide code
Control Bit
0
0
1
1
1
1
1
1
x
x
x
x
x
x
F
Symbol 1
TABLE 3-7 National Byte Wide Code
(Continued)
n
n
C
C
I
I
Not I
Not I
x
M
M
Not M
Not M
x
Data
27
Control Bit
to be in the Active Line State upon reception of the Starting
Delimiter (JK symbol pair)
During Idle Line State any non Idle symbols will be reflected
as the code I uILS If both symbols received during Idle Line
State are Idle symbols then the Symbol Decoder generates
I kILS as its output Note the coded Known Unknown Bit
(b3) and the Last Known Line State (b2 – 0) The Receive
State is 4 bits long and it represents either the PHY Invalid
(0011) or the Idle Line State (1011) condition The Known
Unknown Bit shows if the symbols received match the line
state information in the last 3 bits
During any line state other than Idle Line State or Active
Line State the Symbol Decoder generates the code V kLS
if the incoming symbols match the current line state The
symbol decoder generates V uLS if the incoming symbols
do not match the current line state
0
1
0
1
1
1
1
1
x
x
x
x
x
x
Symbol 2
n
C
n
C
I
Not I
I
Not I
x
M
Not M
M
Not M
x
Data
Control Bit
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
National Code
n-n
N-C
C-N
C-C
I -k-LS
I -u-LS
I -u-LS
I -u-LS
I -k-ILS
V -k-LS
V -u-LS
V -u-LS
or L -u-ILS
0011 1011
0011 1010
1011 1000
V -u-LS
V -k-LS V -u-LS
Data

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