DSP56001FE33 MOTOROLA [Motorola, Inc], DSP56001FE33 Datasheet - Page 35

• Manufacturer Part Number: DSP56001FE33
• Description: 24-Bit General Purpose Digital Signal Processor
• Manufacturer: MOTOROLA [Motorola, Inc]

DSP56001
Num
140
141
142
143
144
145
146
147
148
149
Clk Low Transition To Address Valid
Clk High Transition To WR
Assertion (see Note 2)
Clk High Transition To WR
Clk High Transition To RD Assertion
Clk High Transition To RD Deassertion
Clk Low Transition To Data-Out Valid
Clk Low Transition To Data-Out Invalid
(see Note 3)
Data-In Valid To Clk High Transition
(Setup)
Clk High Transition To Data-In Invalid
(Hold)
Clk Low To Address Invalid
Deassertion
(see Note 3)
Notes:
Vcc = 5.0 Vdc + 10%; T
Vcc = 5.0 Vdc + 5%; T
1. AC timing specifications which are referenced to a device input signal are
2. WS are wait state values specified in the BCR.
3. Clk low to data-out invalid (spec. 146) and Clk low to address invalid (spec.
AC Electrical Characteristics - External Bus Synchronous Timing
measured in production with respect to the 50% point of the respective input
signal’s transition.
149) indicate the time after which data/address are no longer guaranteed to
be valid.
Characteristics
DSP56001 Electrical Characteristics
J
J
= -40 to 105° C at 33 MHz
= -40 to 105° C at 20.5 MHz 27 MHz
WS > 0
WS = 0
Min
—
12
—
0
0
5
0
5
5
0
3
20.5 MHz
tch+19
Max
24
19
21
19
17
25
—
—
—
—
Min
12
—
—
0
0
5
0
5
4
0
3
27 MHz
tch+15
Max
19
15
16
15
13
19
—
—
—
—
Min
4.5
3.5
13
—
—
0
0
5
0
0
3
33 MHz
tch+17
Max
MOTOROLA
10.5
19
17
13
16
19
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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