DSP56001FE33 MOTOROLA [Motorola, Inc], DSP56001FE33 Datasheet - Page 19

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DSP56001FE33

Manufacturer Part Number
DSP56001FE33
Description
24-Bit General Purpose Digital Signal Processor
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSP56001FE33
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
DSP56001
Num
46
47
48
49
DMA HACK Deassertion to HREQ
Assertion
Delay from HEN Deassertion to HREQ
Assertion for RXL Read
Delay from HEN Deassertion to HREQ
Assertion for TXL Write
Delay from HEN Assertion to HREQ
Deassertion for RXL Read, TXL Write
(see Note 3)
Notes:
EXTERNAL
INTERNAL
(Vcc = 5.0 Vdc + 10%, T
(Vcc = 5.0 Vdc + 5%, T
see Host Figures 1 through 6)
cyc = Clock cycle = 1/2 instruction cycle = 2 T cycles
tHSDL = Host Synchronization Delay Time
Active low lines should be “pulled up” in a manner consistent with the AC and DC specifications
1. “Host synchronization delay (tHSDL)” is the time period required for the
2. See HOST PORT USAGE CONSIDERATIONS.
3. HREQ is pulled up by a 1k resistor.
4. This timing must be adhered to only if two consecutive reads from one of these registers are executed.
5. It is recommended that timing #32 be 2cyc+tch+10 minimum for 20.5 MHz, 2cyc+tch+7 minimum for 27 MHz,
and 2cyc+tch+6 minimum for 33 MHz if two consecutive writes to TXL are executed without polling TXDE or
HREQ.
whether it is high or low, and synchronize it to the DSP56001 internal clock.
DSP56001 to sample any external asynchronous input signal, determine
Characteristics
AC Electrical Characteristics - Host I/O Timing (Continued)
for All Other Cases
for DMA RXL Read
for DMA TXL Write
DSP56001 Electrical Characteristics
(see Note 3)
(see Note 3)
(see Note 3)
J
J
= -40 to +105° C, CL = 50 pf + 1 TTL Load at 33 MHz,
= -40 to +105° C, CL = 50 pf + 1 TTL Load at 20.5 MHz and 27 MHz
Host Figure 1. Host Synchronization Delay
tHSDL+cyc+5
tHSDL+cyc+5
tHSDL+cyc
tHSDL+cyc
+tch+5
+tch+5
Min
20.5 MHz
5
5
Max
30
75
tHSDL+cyc+4
tHSDL+cyc+4
tHSDL+cyc
tHSDL+cyc
+tch+4
+tch+4
Min
4
4
27 MHz
30
Max
70
tHSDL+cyc+4
tHSDL+cyc+4
tHSDL+cyc
tHSDL+cyc
+tch+4
+tch+4
Min
4
4
33 MHz
MOTOROLA
Max
65
Unit
ns
ns
ns
ns
ns
ns
19

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