PCF85134HL-1 NXP [NXP Semiconductors], PCF85134HL-1 Datasheet - Page 20

• Manufacturer Part Number: PCF85134HL-1
• Description: Universal LCD driver for low multiplex rates
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
8. Basic architecture
PCF85134_1
Product data sheet
8.1.1.1 START and STOP conditions
8.1.1 Bit transfer
8.1.2 System configuration
8.1 Characteristics of the I
The I
The two lines are a Serial Data line (SDA) and a Serial Clock Line (SCL). Both lines must
be connected to a positive supply via a pull-up resistor when connected to the output
stages of a device. Data transfer may be initiated only when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as a control signal. Bit transfer is illustrated in
Both data and clock lines remain HIGH when the bus is not busy.
A HIGH-to-LOW change of the data line, while the clock is HIGH, is defined as the START
condition (S).
A LOW-to-HIGH change of the data line, while the clock is HIGH, is defined as the STOP
condition (P).
The START and STOP conditions are illustrated in
A device generating a message is a transmitter, a device receiving a message is the
receiver. The device that controls the message is the master; and the devices which are
controlled by the master are the slaves. The system configuration is shown in
Fig 11. Bit transfer
Fig 12. Definition of START and STOP conditions
2
C-bus is for bidirectional, two-line communication between different ICs or modules.
SDA
SCL
START condition
SDA
SCL
S
Rev. 01 — 17 December 2009
2
C-bus
data valid
data line
stable;
Universal LCD driver for low multiplex rates
change
allowed
of data
Figure
12.
STOP condition
Figure
mba607
P
PCF85134
© NXP B.V. 2009. All rights reserved.
11.
Figure
mbc622
SDA
SCL
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13.