VSC8140QR VITESSE [Vitesse Semiconductor Corporation], VSC8140QR Datasheet - Page 8

• Manufacturer Part Number: VSC8140QR
• Description: 2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator
• Manufacturer: VITESSE [Vitesse Semiconductor Corporation]

Transceiver with Integrated Clock Generator
2.48832Gb/s 16:1 SONET/SDH
Page 8
Split Loopback
received (RXIN) and clock (RXCLKIN) are muxed through to the high-speed serial outputs (TXOUT and
TXCLKOUT). The low-speed 16-bit transmit stream (TXIN[15:0]) is muxed into the low-speed 16-bit receive
output stream (RXOUT[15:0]). See Figure 12.
Looptiming
using the receive high-speed clock (RXCLKIN), and the entire part is synchronously clocked from a single
external source.
Equipment and Facility Loopback modes can be enabled simultaneously. In this case, high-speed serial data
LOOPTIM0 mode bypasses the PLL when LOOPTIM0 is asserted high. In this mode, the PLL is bypassed
TXCLKOUT+
TXCLKOUT-
EQULOOP
RXCLKIN+
RXCLKIN-
FACLOOP
TXOUT+
TXOUT-
RXIN+
RXIN-
TXCLKOUT+
TXCLKOUT-
EQULOOP
RXCLKIN+
TXOUT+
TXOUT-
RXCLKIN-
RXIN+
RXIN-
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: [phone]
Q D
Q D
D Q
Figure 11: Equipment Loopback Data Path
VITESSE
1
0
1
0
SEMICONDUCTOR CORPORATION
VITESSE SEMICONDUCTOR CORPORATION
Figure 12: Split Loopback Datapaths
D Q
1
0
0
1
1
0
0
1
16:1 Parallel to
Serial
1:16 Serial to
Parallel
2.48832GHz
2.48832GHz
16:1 Parallel to
Serial
1:16 Serial to
Parallel
PLL
PLL
RXOUT[15:0]
RXCLK16O
RXCLK32O
TXCLK16O
TXCLK16I
TXIN[15:0]
RXOUT[15:0]
RXCLK32O
TXCLK16O
RXCLK16O
TXCLK16I
TXIN[15:0]
VSC8140
Data Sheet
G52251-0, Rev. 4.0
9/6/00