VSC8140QR VITESSE [Vitesse Semiconductor Corporation], VSC8140QR Datasheet - Page 16

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VSC8140QR

Manufacturer Part Number
VSC8140QR
Description
2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator
Manufacturer
VITESSE [Vitesse Semiconductor Corporation]
Datasheet

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Transceiver with Integrated Clock Generator
2.48832Gb/s 16:1 SONET/SDH
Page 16
Table 2: Receiver AC Characteristics
t
t
t
t
t
RXCLK16O
t
t
RXCLKIN
Parameters
RXPDD
RXPD32
RXDR
RXCLKR
RXCLKF
RXDSU
RXDH
, t
RXDF
,
Differential Serial Data Input
D
Parallel Data Clock Output
Parallel Data Clock Output
D
Differential Clock Input
Parallel Data Outputs
Data valid from falling edge of
RXCLK16O+
RXCLK32O transition from
falling edge of RXCLK16O+
RXOUT[15:0]+/- rise and fall
times
RXCLK16O+/- rise and fall
times
RXCLK16O+/- duty cycle
distortion
RXIN+ setup time with respect
to falling edge of RXCLKIN+
RXIN+ hold time with
respect to falling edge of
RXCLKIN+
RXCLKIN+/- duty cycle
distortion
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
RXOUT[0:15]+
RXCLK16O+
RXCLK32O+
RXCLKIN+
Description
Figure 23: Receiver Setup and Hold Time Requirements
RXIN+
Figure 22: Receiver AC Timing Waveforms
VITESSE
SEMICONDUCTOR CORPORATION
VITESSE SEMICONDUCTOR CORPORATION
NOTE: Bit 15 (MSB) is received first, Bit 0 (LSB) is received last.
t
RXDSU
Valid Data 1
MSB
= don’t care
t
D15
RXDSU
Min
100
45
75
40
0
0
D14
Typ
t
RXDH
D13
Max
800
300
250
1.0
55
60
Time
t
t
RXPDD
RXPD32
clock cycle
clock cycle
Units
% of
% of
ps
ns
ps
ps
ps
ps
Valid Data 2
D1
20% to 80% into DC termination.
See Figure 24.
20% to 80% into 100 load.
See Figure 24.
High-speed clock input at
2.48832GHz.
LSB
D0
Conditions
VSC8140
Data Sheet
G52251-0, Rev. 4.0
9/6/00

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