MBM29F400BC-55 FUJITSU [Fujitsu Component Limited.], MBM29F400BC-55 Datasheet - Page 38

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MBM29F400BC-55

Manufacturer Part Number
MBM29F400BC-55
Description
4M (512K X 8/256K X 16) BIT
Manufacturer
FUJITSU [Fujitsu Component Limited.]
Datasheet
38
MBM29F400TC
EMBEDDED ALGORITHMS
* : The sequence is applied for
The addresses differ from
Chip Erase Command Sequence*
(Address/Command):
2AAH/55H
2AAH/55H
555H/AAH
555H/AAH
555H/80H
555H/10H
-55/-70/-90
Figure 20
8 mode.
Data Polling or Toggle Bit
16 mode.
Successfully Completed
Write Erase Command
Erasure Completed
(See Below)
/MBM29F400BC
Sequece
Embedded Erase Algorithm
Start
Individual Sector/Multiple Sector*
Erase Command Sequence
(Address/Command):
Sector Address/30H
Sector Address/30H
Sector Address/30H
555H/AAH
2AAH/55H
555H/AAH
2AAH/55H
555H/80H
Additional sector
erase commands
are optional.
-55/-70/-90

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