MT32LD3264A MICRON [Micron Technology], MT32LD3264A Datasheet - Page 12

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MT32LD3264A

Manufacturer Part Number
MT32LD3264A
Description
DRAM MODULE
Manufacturer
MICRON [Micron Technology]
Datasheet
EDO PAGE MODE
AC ELECTRICAL CHARACTERISTICS
(Notes: 5, 6, 7, 8, 9, 12, 29) (V
8, 16, 32 Meg x 64 Nonbuffered DRAM DIMMs
DM78.p65 – Rev. 2/99
AC CHARACTERISTICS
PARAMETER
Refresh period (4,096 cycles)
RAS# precharge time
RAS# to CAS# precharge time
READ command hold time (referenced to RAS#)
RAS# hold time
READ-WRITE cycle time
RAS# to WE# delay time
WRITE command to RAS# lead time
Transition time (rise or fall)
WRITE command hold time
WRITE command hold time (referenced to RAS#)
WE# command setup time
Output disable delay from WE# (CAS# HIGH)
WRITE command pulse width
WE# pulse width for output
disable when CAS# HIGH
WE# hold time (CBR Refresh)
WE# setup time (CBR Refresh)
DD
= +3.3V ±0.3V)
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RWD
WCH
WHZ
WRH
RWC
RWL
WCR
WCS
t
WPZ
WRP
RRH
RSH
REF
t
RPC
WP
RP
t
T
12
MIN
116
30
13
67
13
38
10
5
0
2
8
0
5
8
8
NONBUFFERED DRAM DIMMs
-5
MAX
Micron Technology, Inc., reserves the right to change products or specifications without notice.
64
50
12
MIN
140
40
15
79
15
10
45
10
10
10
5
0
2
0
5
8, 16, 32 MEG x 64
-6
MAX
64
50
15
UNITS
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
©1999, Micron Technology, Inc.
NOTES
18
23

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