ICS1893 Integrated Circuit Systems, ICS1893 Datasheet - Page 53

• Manufacturer Part Number: ICS1893
• Description: 3.3-V 10Base-T/100Base-TX Integrated PHYceiver
• Manufacturer: Integrated Circuit Systems

7.5.6 10Base-T Operation: Smart Squelch
7.5.7 10Base-T Operation: Carrier Detection
7.5.8 10Base-T Operation: Collision Detection
ICS1893 Rev C 6/6/00
Note:
1. An ICS1893 receives ‘ valid data’ when its Twisted-Pair Receiver phase-locked loop can acquire lock
2. When a link is invalid and the Link Monitor Function detects the presence of data, the ICS1893 does
3. Enabling or disabling the Smart Squelch Function affects the Link Monitor function.
4. A transition from the invalid state to the valid state does not automatically update the latching-low Link
The Smart Squelch Function imposes more stringent requirements on the Link Monitor Function regarding
the definition of a valid link, thereby providing a level of insurance that spurious noise is not mistaken for a
valid link during cable installation.
An STA can control the execution of the ICS1893 Smart Squelch Function using bit 18.0 (the Smart
Squelch Inhibit bit in the 10Base-T Operations Register). When bit 18.0 is logic:
•
•
In 10Base-T mode, an ICS1893 appends an IDL to the end of each packet during data transmission. The
receiving PHY (that is, the remote link partner) sees this IDL and removes it from the data stream.
The ICS1893 has a 10Base-T Carrier Detection Function that establishes the state of its Carrier Sense
signal (CRS), based upon the state of its Transmit and Receive state machines. These functions indicate
whether the ICS1893 is (1) transmitting data, (2) receiving data, or (3) in a collision state (that is, the
ICS1893 is both transmitting and receiving data on its twisted-pair medium, as defined in the ISO/IEC
8802-3 standard). When the ICS1893 is configured for:
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•
The ICS1893 has a 10Base-T Collision Detection Function that establishes the state of its Collision
Detection signal (COL) based upon both (1) the state of its Receiver state machine and (2) the state of its
Transmit state machine. When the ICS1893 is operating in:
•
•
Zero (the default), an ICS1893 enables its Smart Squelch Function. In this case, the Link Monitor must
confirm the presence of both data and a valid IDL at the end of the packet before declaring a link valid.
One, an ICS1893 disables or inhibits its Smart Squelch Function. In this case, the Link Monitor does not
have to confirm the presence of an IDL to declare a link valid (that is, the reception of any data is
sufficient).
Half-duplex operations, the ICS1893 asserts its CRS signal when either transmitting or receiving data.
Full-duplex operations (or when it is in Repeater mode), the ICS1893 asserts its CRS signal only when it
is receiving data.
Half-duplex mode, the ICS1893 asserts its COL signal to indicate it is receiving data while transmission
of data is also in progress.
Full-duplex mode, the ICS1893 always sets its COL signal to FALSE.
ICS1893 - Release
and extract the receive clock from the incoming data stream for a minimum of three consecutive bit
times.
not transition the link to the valid state until after the reception of the present packet is complete.
Status bit.
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
53
Chapter 7 Functional Blocks
June, 2000