UPD72042BGT NEC [NEC], UPD72042BGT Datasheet - Page 21

• Manufacturer Part Number: UPD72042BGT
• Description: LSI DEVICE FOR Inter Equipment Bus (IEBus) PROTOCOL CONTROL
• Manufacturer: NEC [NEC]

2.5 BIT FORMAT
and the duration of each period allotted within the bit vary depending on the type of the transmission bits, and whether
the unit is a master or slave.
Fig. 2-4 illustrates the bits that constitute an IEBus communication frame.
Preparation period
Synchronization period
Data period
The synchronization and data periods are almost equal in duration.
For the IEBus, synchronization is established for each bit. The specifications of the total time required for a bit
Logic "1"
Logic "0"
Logic 1: The potential difference between the bus lines (the BUS+ and BUS- pins) is 20 mV or less (low level).
Logic 0: The potential difference between the bus lines (the BUS+ and BUS- pins) is 120 mV or more (high level).
Preparation
period
: First and subsequent low-level (logic 1) periods
: Next high-level (logic 0) period
: Period in which a bit value is indicated (logic 1 = low level, logic 0 = high level)
Synchronization
period
Fig. 2-4 IEBus Bit Format (Concept)
Data Sheet S13990EJ3V0DS
Data period
Preparation
period
Synchronization
period
Data period
PD72042B
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