f75373 Feature Integration Technology Inc., f75373 Datasheet - Page 27

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f75373

Manufacturer Part Number
f75373
Description
Fintek Hardware Monitor Ic Datasheet
Manufacturer
Feature Integration Technology Inc.
Datasheet
6.19
Power on default: B4h
Fan Fault Time Register -- Index 61h
5-4
3
2
1
0
7-0
Bit
FAN1_MODE
Reserved
KEEP_DROP_DU
TY2
KEEP_DROP_DU
TY1
EN_RESET_TIME
R
F_FAULT_TIME
Fintek
Name
Attribute
R/W
R/W
R/W
R/W
R/W
Set to 1, keep PWMOUT2 duty-cycle decrease to DROP duty and
Set to 1, keep PWMOUT1 duty-cycle decrease to DROP duty and
automatically adjusted according to FAN2 EXPECT register.
01: FAN2 operates in TEMPERATURE mode. PWMOUT2 duty-cycle
is automatically adjusted according to FAN2 EXPECT register, which
will be automatically loaded into preset values according to the
current temperature. (When PIN3 power-on trapped to 1, this mode
is selected after power-on.)
1X: FAN2 operates in MANUAL mode. Software set the PWMOUT2
duty-cycle directly.
00: FAN1 operates in SPEED mode. PWMOUT1 duty-cycle is
automatically adjusted according to FAN1 EXPECT register.
01: FAN1 operates in TEMPERATURE mode. PWMOUT1 duty-cycle
is automatically adjusted according to FAN1 EXPECT register, which
will be automatically loaded into preset values according to the
current temperature. (When PIN3 power-on trapped to 1, this mode
is selected after power-on.)
1X: FAN1 operates in MANUAL mode. Software set the PWMOUT1
duty-cycle directly.
Set to 1, enable interface_idle timer. Set to 0, disable the timer.
When the timer is enabled, if software doesn’t access the this chip
through GP_CLK and GP_DATA, the reset timer starts to count down
according to the value set in INDEX 62H. When it counts down to
zero, INDEX[72H, 73H] will be loaded into INDEX[74H,75H].
This register determines the time of fan fault. Two conditions cause
fan fault event:
hold.
hold.
22
Feature Integration Technology Inc.
Description
F75373
V0.25P

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