at572d940hf-cl ATMEL Corporation, at572d940hf-cl Datasheet - Page 22

• Manufacturer Part Number: at572d940hf-cl
• Description: Diopsis 940hf Arm926ej-s Plus Gflops
• Manufacturer: ATMEL Corporation

5.4.2.1
5.4.2.2
5.5
5.6
22
Peripheral Data Controller (PDC)
USB Host
AT572D940HF Preliminary
BMS = 1, Boot on Embedded ROM
BMS = 0, Boot on External Memory
The system boots using the Boot Program from the embedded ROM following the steps listed
below:
Checks the presence of an SD card with a boot.bin file in the main dir:
If the file is found:
If the file is not found, downloads the code from the SPI DataFlash
In case no valid program is detected in the external SPI DataFlash:
The customer-programmed software must perform a complete configuration.
To speed up the boot sequence when booting at 32 kHz EBI CS0 (BMS=0), the user must take
the following steps:
The PDC acting as an AHB master controls the data transfer between on chip peripherals:
USARTs, SPIs, SSCs, MCI, DBGU, TWIs and the on- and off-chip memories. This leaves both
the processors free of the overhead related to this function.
The USB host acting as an AHB master controls the data exchange between the two USB host
channels (port A and port B) and the ARM Internal RAM or the external memories.
The USB Host Port features:
• Downloads the code in internal SRAM at 0x300000
• Executes Remap command
• Runs SD Boot code
• Downloads the code in internal SRAM at 0x300000
• Checks the presence of a valid code on the first six word
• Executes Remap command
• Runs DataFlash Boot code
• Boot on slow clock (32,768 Hz)
• Boot with the default configuration for the Static Memory Controller, byte select mode, 32-bit
1. Program the PMC (main oscillator enable or bypass mode).
2. Program and start the PLL.
3. Reprogram the SMC setup, cycle, hold, mode timings registers for CS0 to adapt them
4. Switch the main clock to the new value.
data bus, Read/Write controlled by Chip Select, allows boot on 32-bit non-volatile memory.
–
–
to the new clock Peripheral Data Controller (PDC).
Activates a Boot uploader enabling small monitor functionalities (read/write/run)
interface with the SAM-BA
Performs an automatic detection of the communication link:
Serial communication on a DBGU (XModem protocol)
USB Device Port (CDC Protocol)
™
application
®
:
7010AS–DSP–07/07