w332m72v ETC-unknow, w332m72v Datasheet - Page 9

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w332m72v

Manufacturer Part Number
w332m72v
Description
32mx72 Synchronous Dram
Manufacturer
ETC-unknow
Datasheet
spec i fied for the clock pin) prior to CKE going back
HIGH. Once CKE is HIGH, the SDRAM must have NOP
commands is sued (a minimum of two clocks) for t
because time is required for the com ple tion of any internal
refresh in progress.
Upon exiting the self refresh mode, AUTO REFRESH
com mands must be issued as both SELF REFRESH and
AUTO REFRESH utilize the row refresh counter.
NOTE:
Stress greater than those listed under "Absolute Maximum Ratings" may cause per ma nent damage to the device. This is a stress rating
only and func tion al op er a tion of the device at these or any other conditions greater than those in di cat ed in the operational sections of
this specifi cation is not implied. Exposure to ab so lute maximum rating con di tions for extended periods may affect reliability.
NOTE:
Refer to Application Note “PBGA Thermal Resistance Correlation” at www.wedc.com in the
application notes section for modeling conditions.
August 2005
Rev. 2
Parameter
Voltage on V
Voltage on NC or I/O pins relative to Vss
Operating Temperature TA (Mil)
Operating Temperature TA (Ind)
Storage Temperature, Plastic
Parameter
Input Capacitance: CLK
Addresses, BA0-1 Input Capacitance
Input Capacitance: All other input-only pins
Input/Output Capacitance: I/Os
Description
Junction to Ambient (No Airfl ow)
Junction to Ball
Junction to Case (Top)
CC
, V
CCQ
Supply relative to Vss
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
BGA THERMAL RESISTANCE
CAPACITANCE (NOTE 2)
XSR
,
9
Theta JC
Theta JA
Theta JB
Symbol
Symbol
CIO
CI1
CI2
CA
-55 to +125
-55 to +125
-40 to +85
-1 to 4.6
-1 to 4.6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
Max
13.7
10.3
4.6
Max
24
7
9
9
W332M72V-XSBX
Unit
C/W
C/W
C/W
Unit
°C
°C
°C
V
V
Unit
pF
pF
pF
pF
Notes
1
1
1

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