hys64t512020eu-3s-a Qimonda, hys64t512020eu-3s-a Datasheet - Page 39

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hys64t512020eu-3s-a

Manufacturer Part Number
hys64t512020eu-3s-a
Description
240-pin Unbuffered Ddr2 Sdram Modules
Manufacturer
Qimonda
Datasheet
1) Multiplying “Memory Density per I/O” with “Module Data Width” and dividing by 8 for Non-ECC and 9 for ECC modules gives the overall
Rev. 1.0, 2008-06
06112008-YHWK-B105
Field
10
11
Field
1
2
3
4
5+6
7
8
9
10
module memory density in MBytes as listed in column “Coding”.
Description
Qimonda Component Prefix
Interface Voltage [V]
DRAM Technology
Component Density [Mbit]
Number of I/Os
Product Variations
Die Revision
Package, Lead-Free Status
Speed Grade
Description
Speed Grade
Die Revision
Values
HYB
18
T
256
512
1G
2G
40
80
16
0 .. 9
A
B
C
F
–19F
–1.9
–25F
–2.5
–3
–3S
–3.7
–5
Values
–19F
–1.9
–25F
–2.5
–3
–3S
–3.7
–5
–A
–B
39
SSTL_18
256 Mbit
Coding
Constant
DDR2
512 Mbit
1 Gbit
2 Gbit
×4
×8
×16
Look up table
First
Second
FBGA, lead-containing
FBGA, lead-free
PC2–8500 6–6–6
PC2–8500 7–7–7
PC2–6400 5–5–5
PC2–6400 6–6–6
PC2–5300 4–4–4
PC2–5300 5–5–5
PC2–4200 4–4–4
PC2–3200 3–3–3
HYS[64/72]T512020EU–[25F/2.5/3S]–A
Coding
PC2–8500 6–6–6
PC2–8500 7–7–7
PC2–6400 5–5–5
PC2–6400 6–6–6
PC2–5300 4–4–4
PC2–5300 5–5–5
PC2–4200 4–4–4
PC2–3200 3–3–3
First
Second
Unbuffered DDR2 SDRAM Modules
DDR2 DRAM Nomenclature
Internet Data Sheet
TABLE 23

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