m470t2864qz3 Samsung Semiconductor, Inc., m470t2864qz3 Datasheet
m470t2864qz3
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m470t2864qz3 Summary of contents
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SODIMM DDR2 Unbuffered SODIMM 200pin Unbuffered SODIMM based on 1Gb Q-die 60FBGA & 84FBGA with Lead-Free and Halogen-Free INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT ...
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... Electrical Characteristics & AC Timing for DDR2-800/667 ...................................................14 13.1 Refresh Parameters by Device Density 13.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin 13.3 Timing Parameters by Speed Grade 14.0 Physical Dimensions : .............................................................................................................17 14.1 128Mbx8 based 256Mx64 Module (2 Rank) 14.2 64Mbx16 based 128Mx64 Module (2 Rank) 14.3 64Mbx16 based 64Mx64 Module (1 Rank) .......................................................................................7 .......................................................................................8 ...
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SODIMM Revision History Revision Month Year 1.0 September 2007 1.01 April 2008 1.1 July 2008 - Initial Release - Typo Correction - Applied JEDEC update(JESD79-2E timing table DDR2 SDRAM History Rev. 1.1 July 2008 ...
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... Package: 60ball FBGA - 128Mx8 and 84ball FBGA - 64Mx16 • All of base components are Lead-Free, Halogen-Free, and RoHS compliant Note : For detailed DDR2 SDRAM operation, please refer to Samsung’s Device operation & Timing diagram. 3.0 Address Configuration Organization 128Mx8(1Gb) based Module 64Mx16(1Gb) based Module Density Organization Component Composition 2GB 256Mx64 ...
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... DQS2 Note : Connect; NC, TEST(pin 163)is for bus analysis tool and is not connected on normal memory modules. 5.0 Pin Description Pin Name Description CK0,CK1 Clock Inputs, positive line CK0,CK1 Clock Inputs, negative line CKE0,CKE1 Clock Enables RAS Row Address Strobe ...
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... DDR2 SDRAMs and is sent at the leading edge of the data window. DQS signals are com- plements, and timing is relative to the crosspoint of respective DQS and DQS If the module oper- ated in single ended strobe mode, all DQS signals must be tied on the system board to V SDRAM mode registers programmed appropriately ...
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... SODIMM 7.0 Functional Block Diagram : 7.1 2GB, 256Mx64 Module - M470T5663QZ(H)3 (Populated as 2 ranks of x8 DDR2 SDRAMs) 3Ω CKE1 ODT1 S1 CKE0 ODT0 S0 DQS0 DQS DQS DQS0 DM DM0 DQ0 I/O 0 DQ1 I/O 1 DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS DQS1 DQS DM DM1 DQ8 I/O 8 DQ9 I/O 9 DQ10 I/O 10 DQ11 ...
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... SODIMM 7.2 1GB, 128Mx64 Module - M470T2864QZ(H)3 (Populated as 2 rank of x16 DDR2 SDRAMs) 3Ω ODT1 ODT0 CKE1 CKE0 S1 S0 DQS0 CS LDQS DQS0 LDQS LDM DM0 DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 UDQS UDQS DQS1 UDM DM1 DQ8 I/O 8 DQ9 I/O 9 DQ10 ...
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... SODIMM 7.3 512MB, 64Mx64 Module - M470T6464QZ(H)3 (Populated as 1 rank of x16 DDR2 SDRAMs) 3Ω CKE0 ODT0 S0 DQS0 DQS0 DM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS1 DQS1 DM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS2 DQS2 DM2 DQ16 DQ17 ...
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SODIMM 8.0 Absolute Maximum DC Ratings Symbol Parameter Voltage Voltage DDQ DDQ Voltage DDL DDL Voltage on any pin relative IN, OUT T Storage Temperature ...
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SODIMM 9.2 Operating Temperature Condition Symbol T Operating Temperature OPER Note : 1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51.2 standard ...
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SODIMM 10.0 IDD Specification Parameters Definition (IDD values are for full operating range of Voltage and Temperature) Symbol Operating one bank active-precharge current; IDD0 tCK = tCK(IDD), tRC = tRC(IDD), tRAS = tRASmin(IDD); CKE is HIGH HIGH between ...
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... IDD3P-S 72 IDD3N 220 IDD4W 520 IDD4R 700 IDD5 580 IDD6 60 IDD7 1,060 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. 800@CL=6 LE7 CF7 LF7 880 960 128 240 128 480 560 560 288 ...
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SODIMM 12.0 Input/Output Capacitance Parameter Non-ECC Input capacitance, CK and CK Input capacitance, CKE , CS, Addr, RAS, CAS, WE Input/output capacitance, DQ, DM, DQS, DQS * DM is internally loaded to match DQ and DQS identically. 13.0 Electrical Characteristics ...
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SODIMM 13.3 Timing Parameters by Speed Grade (Refer to notes for informations related to this table at the component datasheet) Parameter DQ output access time from CK/CK DQS output access time from CK/CK Average clock HIGH pulse width Average clock ...
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SODIMM Parameter Four Activate Window for 1KB page size products Four Activate Window for 2KB page size products CAS to CAS command delay Write recovery time Auto precharge write recovery + precharge time Internal write to read command delay Internal ...
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... SODIMM 14.0 Physical Dimensions : 14.1 128Mbx8 based 256Mx64 Module (2 Rank) - M470T5663QZ(H ± 11.40 0.15 mm ± 16.25 0.15 mm 63. 67.60 FRONT SIDE ± 4.20 0.15 1.50 ± 0.10 2.70 ± 0.10 1.0 ± 0.05 4.00 ± 0.10 The used device is 128M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T1G084QQ ± 67.60 0.15 mm min 2.00 SPD b 199 ± 47.40 0.15 mm ± 0.15 mm 200 ± 0.15 mm DETAIL a BACK SIDE 4.00 ± ...
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... SODIMM 14.2 64Mbx16 based 128Mx64 Module (2 Rank) - M470T2864QZ(H)3 1 ± 11.40 0.15 mm ± 16.25 0. FRONT SIDE ± 4.20 0.15 1.50 ± 0.10 2.70 ± 0.10 1.0 ± 0.05 4.00 ± 0.10 The used device is 64M x16 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T1G164QQ ± 67.60 0. 199 ± 47.40 0.15 mm ± 63.00 0.15 mm 200 a ± 67.60 0.15 mm DETAIL a BACK SIDE 4.00 ± 0.10 1.0 ± 0.05 1.80 ± ...
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... SODIMM 14.3 64Mbx16 based 64Mx64 Module (1 Rank) 1 ± 11.40 0.15 mm ± 16.25 0. FRONT SIDE ± 4.20 0.15 1.50 ± 0.10 2.70 ± 0.10 1.0 ± 0.05 4.00 ± 0.10 The used device is 64M x16 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T1G164QQ - M470T6464QZ(H)3 ± 67.60 0. 199 ± 47.40 0.15 mm ± 63.00 0.15 mm 200 a ± 67.60 0.15 mm DETAIL a BACK SIDE 4.00 ± 0.10 1.0 ± 0.05 1.80 ± ...