mt8vddt3264hdg-335 Micron Semiconductor Products, mt8vddt3264hdg-335 Datasheet - Page 12

• Manufacturer Part Number: mt8vddt3264hdg-335
• Description: 128mb, 256mb, 512mb, 1gb X64, Dr 200-pin Ddr Sodimm
• Manufacturer: Micron Semiconductor Products

Table 14:
PDF: 09005aef80765fab/Source: 09005aef806e1d28
DD8C16_32_64_128x64HD.fm - Rev. D 11/07 EN
Parameter/Condition
Operating one bank active-precharge current:
(MIN); DQ, DM, and DQS inputs changing once per clock cycle; Address and
control inputs changing once every two clock cycles
Operating one bank active-read-precharge current: BL = 4;
t
cycle
Precharge power-down standby current: All device banks idle; Power-down
mode;
Idle standby current: CS# = HIGH; All device banks idle;
CKE = HIGH; Address and other control inputs changing once per clock cycle;
V
Active power-down standby current: One device bank active; Power-down
mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device bank active;
t
clock cycle; Address and other control inputs changing once per clock cycle
Operating burst READ current: BL = 2; Continuous burst READs; One device
bank active; Address and control inputs changing once per clock cycle;
(MIN); I
Operating burst WRITE current: BL = 2; Continuous burst WRITEs; One device
bank active; Address and control inputs changing once per clock cycle;
t
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave READ current: Four device bank interleaving
READs (BL = 4) with auto precharge;
and control inputs change only during active READ or WRITE commands
CK =
RC =
CK =
IN
= V
t
t
t
CK (MIN); I
RAS (MAX);
CK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle
REF
t
t
OUT
CK =
CK =
for DQ, DM, and DQS
= 0mA
t
t
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
I
Values are shown for the MT46V64M16 DDR SDRAM only and are computed from values specified in the
1Gb (64 Meg x 16) component data sheet
DD
OUT
Specifications and Conditions – 1GB
t
Notes:
CK =
= 0mA; Address and control inputs changing once per clock
t
CK (MIN); DQ, DM, and DQS inputs changing twice per
1. Value calculated as one module rank in this operating condition; all other module ranks are
2. Value calculated reflects all module ranks in this operating condition.
in I
DD
2P (CKE LOW) mode.
t
RC =
128MB, 256MB, 512MB, 1GB (x64, DR): 200-Pin DDR SODIMM
t
RC (MIN);
t
RC =
t
CK =
t
t
REFC =
REFC = 7.8125µs
t
RC (MIN);
t
CK =
t
12
CK (MIN); Address
t
RFC (MIN)
t
t
CK (MIN);
RC =
t
CK =
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
RC (MIN);
t
CK =
t
CK
t
CK
Symbol
I
I
I
I
I
I
I
DD
DD
DD
I
I
DD
DD
DD
I
I
DD
I
DD
DD
DD
DD
DD
4W
3N
5A
2P
3P
4R
2F
0
1
5
6
7
Electrical Specifications
1
1
2
2
1
2
2
2
1
2
2
1
©2004 Micron Technology, Inc. All rights reserved
1,020
1,040
2,640
2,020
-265
620
820
480
240
360
80
80
72
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA