zl50232 Zarlink Semiconductor, zl50232 Datasheet - Page 10

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zl50232

Manufacturer Part Number
zl50232
Description
32 Channel Voice Echo Canceller
Manufacturer
Zarlink Semiconductor
Datasheet

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2.0
The ZL50232 architecture contains 32 echo cancellers divided into 16 groups. Each group has two echo cancellers,
Echo Canceller A and Echo Canceller B. Each group can be configured in Normal, Extended Delay or
Back-to-Back configurations. In Normal configuration, a group of echo cancellers provides two channels of 64 ms
echo cancellation, which run independently on different channels. In Extended Delay configuration, a group of
echo cancellers achieves 128 ms of echo cancellation by cascading the two echo cancellers (A & B). In
Back-to-Back configuration, the two echo cancellers from the same group are positioned to cancel echo coming
from both directions in a single channel, providing full-duplex 64 ms echo cancellation.
Each echo canceller contains the following main elements (see Figure 4).
Each echo canceller in the ZL50232 has four functional states: Mute, Bypass, Disable Adaptation and Enable
Adaptation. These are explained in the section entitled Echo Canceller Functional States.
(channel N)
(channel N)
ST-BUS
PORT2
Adaptive Filter for estimating the echo channel
Subtractor for cancelling the echo
Double-Talk detector for disabling the filter adaptation during periods of double-talk
Path Change detector for fast reconvergence on major echo path changes
Instability Detector to combat instability in very low ERL environments
Patented Advanced Non-Linear Processor for suppression of residual echo, with comfort noise injection
Disable Tone Detectors for detecting valid disable tones at send and receive path inputs
Narrow-Band Detector for preventing Adaptive Filter divergence from narrow-band signals
Offset Null filters for removing the DC component in PCM channels
+9 to -12 dB level adjusters at all signal ports
Parallel controller interface compatible with Motorola microcontrollers
PCM encoder/decoder compatible with µ/A-Law ITU-T G.711 or Sign-Magnitude coding
Rout
Sin
Device Overview
µ/A-Law/
Linear
µ/A-Law
Linear/
+9 to -12 dB
Level Adjust
Disable Tone
Programmable Bypass
Detector
Instability
Detector
+9 to -12 dB
Level Adjust
Figure 4 - Functional Block Diagram
Offset
Null
Echo Canceller (N), where 0 < N < 31
Zarlink Semiconductor Inc.
-
Σ
ZL50232
Narrow-Band
+9 to -12 dB
Level Adjust
Detector
10
Non-Linear
Processor
Microprocessor
Double - Talk
Detector
Interface
MuteR
Offset
+9 to -12 dB
Null
Level Adjust
Path Change
MuteS
Disable Tone
Detector
Detector
µ/A-Law/
Linear
µ/A-Law
Linear/
(channel N)
(channel N)
ST-BUS
PORT1
Data Sheet
Sout
Rin

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