zl30116 Zarlink Semiconductor, zl30116 Datasheet - Page 20

• Manufacturer Part Number: zl30116
• Description: Sonet/sdh Low Jitter System Synchronizer
• Manufacturer: Zarlink Semiconductor

1.7
In systems that provide redundant timing sources, it is desirable to minimize the output skew between the master
and the slave’s output clocks. This can be achieved by synchronizing the slave to one of the master’s output clocks
instead of synchronizing the slave to an external reference. If frame pulse alignment between the timing sources is
required, then the crossover link should consist of a clk/fp pair.
One method of connecting two ZL30116 devices in a master/slave configuration is shown in Figure 8 where there is
a dedicated crossover link between timing cards. Any of the master’s unused outputs and the slave’s unused inputs
can be used as a crossover link.
Master/Slave Configuration
sdh_clk0
References
ref0
ZL30116
(Master)
ref0 sync0
External
Line Card DPLL
ref1
sdh_fp0
(ZL30119,
ZL30106)
ZL30117,
Figure 8 - Typical Master/Slave Configuration
sdh_clk0
sdh_fp0
ref1 sync1
sync2
ref2
Zarlink Semiconductor Inc.
Crossover Link
ZL30116
20
ref0 sync0
sdh_fp0
sdh_clk0
ref2
sync2
Line Card DPLL
(ZL30119,
ZL30106)
ZL30117,
sdh_clk0
References
ref0
ZL30116
(Slave)
ref1 sync1
External
ref1
sdh_fp0
clk bus 1
clk bus 2
Data Sheet
fp bus 1
fp bus 2