zl30116 Zarlink Semiconductor, zl30116 Datasheet - Page 13

• Manufacturer Part Number: zl30116
• Description: Sonet/sdh Low Jitter System Synchronizer
• Manufacturer: Zarlink Semiconductor

1.2
Both DPLL1 and DPLL2 independently support three modes of operation - free-run, normal, and holdover. The
mode of operation can be manually set or controlled by an automatic state machine as shown in Figure 2.
Free-run
The free-run mode occurs immediately after a reset cycle or when the DPLL has never been synchronized to a
reference input. In this mode, the frequency accuracy of the output clocks is equal to the frequency accuracy of the
external master oscillator.
Lock Acquisition
The input references are continuously monitored for frequency accuracy and phase regularity. If at least one of the
input references is qualified by the reference monitors, then the DPLL will begin lock acquisition on that input. Given
a stable reference input, the ZL30116 will enter in the Normal (locked) mode.
Supported Output
Frame Pulse
Frequencies
External Status Pin
Indicators
1. Limited to 14 Hz for 2 kHz references)
2. In the wideband mode, the loop bandwidth depends on the frequency of the reference input. For reference frequencies greater than
8 kHz, the loop bandwidth = 890 Hz. For reference frequencies equal to 8 kHz, the loop bandwidth = 56 Hz. The loop bandwidth is
equal to 14 Hz for reference frequencies of 2 kHz.
DPLL Mode Control
Feature
qualified and available
No references are
for selection
Reset
As listed in Table 4
Lock, Holdover
Figure 2 - Automatic Mode State Machine
Table 1 - DPLL1 and DPLL2 Features
qualified and available
Another reference is
Selected reference
Free-Run
for selection
fails
DPLL1
Holdover
Zarlink Semiconductor Inc.
ZL30116
13
All references are monitored for
frequency accuracy and phase
regularity, and at least one
reference is qualified.
Acquisition
(Locked)
(Locked)
Normal
Normal
Lock
As listed in Table 4 for p0_fp0, p0_fp not
synchronized to sync reference.
None
DPLL2
Phase lock on
the selected
reference is
achieved
Data Sheet