ml70q5110la Oki Semiconductor, ml70q5110la Datasheet - Page 15

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ml70q5110la

Manufacturer Part Number
ml70q5110la
Description
Bluetooth Baseband Controller Ic
Manufacturer
Oki Semiconductor
Datasheet
APPLICATION NOTES
Operation During Boot Up
Clock Selection
HCI Transport Selection
OKI Semiconductor
Remapping during boot up is performed according to external pins REMAP[1:0].
Bit width that corresponds to BANK0 during boot up is set according to external pin BBWSEL.
BBWSEL = L :
BBWSEL = H :
The CPU clock supply source is selected according to external pin SCLKSEL.
SCLKSEL = L :
SCLKSEL = H :
Note: The clock supply source can also be set by the CLKCNT register in the CTL/WDT block.
Bluetooth transmission clock is selected according to external pin TXCSEL.
TXCSEL = L :
TXCSEL = H :
Note: This clock can also be set by the CLKCNT register in the CTL/WDT block.
SCLK selection (12/13/16 MHz).
SCLKFSEL[1:0] = “00” : 12 MHz
HCI is selected (USB/UART) according to the logical value of GPIO0 at initial powerup of
ML70Q5110LA.
GPIO0 = L
GPIO0 = H
REMAP1
L
L
H
H
:
:
16-bit
Use 32/16/8/4 MHz clock that was divided down from the internal PLL output of
192 MHz that was generated from external pin SCLK. (Initial value is 32 MHz.)
Use external pin XCLK.
Use 1 MHz clock that was divided down from the internal PLL output (192 MHz).
Use external pin TXC_IN.
UART is used as HCI.
USB is used as HCI.
8-bit
“01” : 13 MHz
“10” : 16 MHz
“11” : Forbidden
REMAP0
L
H
L
H
:
:
:
:
Forbidden
Stack Flash ROM
Devices connected to external MCS1
Devices connected to external MCS0
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FEDL70Q5110LA-01
ML70Q5110LA

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