ia186eb Innovasic Semiconductor Inc., ia186eb Datasheet - Page 40

• Manufacturer Part Number: ia186eb
• Description: 8-bit/16-bit Microcontrollers
• Manufacturer: Innovasic Semiconductor Inc.

IA186EB/IA188EB
8-Bit/16-Bit Microcontrollers
Table 8. IA188EB Pin/Signal Descriptions (Continued)
Signal
test_n
ucs_n
wr_n
txd0
txd1
v
v
cc
ss
p2.1/txd1
Name
test_n
ucs_n
wr_n
txd0
v
v
cc
ss
®
43, 63,
42, 64
65, 84
PLCC
1, 23,
2, 22,
14
52
58
30
5
Pin
11, 29,
10, 30,
49, 51,
PQFP
50, 71
70, 72
39
45
18
74
3
UNCONTROLLED WHEN PRINTED OR COPIED
13, 34,
12, 14,
33, 35,
54, 72
53, 73
LQFP
46
61
37
2
8
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IA211080314-02
test. Input. Active Low. When the test_n input
is high (i.e., not asserted), it causes the
IA188EB to suspend operation during the
execution of the WAIT instruction. Operation
resumes when the pin is sampled low
(asserted).
Transmit (tx) data, Serial Port 0. Output. This
pin is the serial data output for Serial Port 0.
During synchronous serial communications,
txd0 becomes the transmit clock (rxd0
functions as an output for data transmission).
Transmit (tx) data, Serial Port 1. Output. This
pin is the serial data output for Serial Port 1.
During synchronous serial communications,
txd0 becomes the transmit clock (rxd1
functions as an output for data transmission).
upper chip select. Output. Active Low. This
pin provides a chip select signal that will be
asserted (low) whenever the address of a
memory bus cycle is within the address space
programmed for that output.
Power (v
IA188EB device. It must be connected to a +5V
DC power source.
Ground (v
ground (0V) for the IA188EB. It must be
connected to a v
write. Output. Active Low. When asserted
(low), wr_n indicates that data available on the
data bus are to be latched into the accessed
memory or I/O device.
cc
ss
). This pin provides power for the
). This pin provides the digital
ss
Description
board plane.
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January 14, 2009
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