ltm4601ahv Linear Technology Corporation, ltm4601ahv Datasheet - Page 14

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ltm4601ahv

Manufacturer Part Number
ltm4601ahv
Description
12a, 28vin Dc/dc ?module With Pll, Output Tracking And Margining
Manufacturer
Linear Technology Corporation
Datasheet

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LTM4601AHV
APPLICATIONS INFORMATION
Run Enable
The RUN pin is used to enable the power module. The
pin has an internal 5.1V zener to ground. The pin can be
driven with a logic input not to exceed 5V.
The RUN pin can also be used as an undervoltage lock out
(UVLO) function by connecting a resistor divider from the
input supply to the RUN pin:
Power Good
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a ±10% window around the regulation point and tracks
with margining.
COMP Pin
This pin is the external compensation pin. The module
has already been internally compensated for most output
voltages. Table 2 is provided for most application require-
ments. A spice model will be provided for other control
loop optimization.
PLLIN
The power module has a phase-locked loop comprised
of an internal voltage controlled oscillator and a phase
detector. This allows the internal top MOSFET turn-on
to be locked to the rising edge of the external clock. The
frequency range is ±30% around the operating frequency
of 850kHz. A pulse detection circuit is used to detect a
clock on the PLLIN pin to turn on the phase lock loop.
The pulse width of the clock has to be at least 400ns and
2V in amplitude. During the start-up of the regulator, the
phase-lock loop function is disabled.
INTV
An internal low dropout regulator produces an internal
5V supply that powers the control circuitry and DRV
for driving the internal power MOSFETs. Therefore, if the
system does not have a 5V power rail, the LTM4601AHV
can be directly powered by V
14
V
UVLO
CC
and DRV
=
R
+ 1 2
R
2
R
CC
Connection
• .
1 5
V
IN
. The gate driver current
CC
through the LDO is about 20mA. The internal LDO power
dissipation can be calculated as:
The LTM4601AHV also provides the external gate driver
voltage pin DRV
recommended to connect DRV
rail. This is especially true for higher input voltages. Do
not apply more than 6V to the DRV
be used to power the DRV
as shown in Figure 18.
Parallel Operation of the Module
The LTM4601AHV device is an inherently current mode
controlled device. Parallel modules will have very good
current sharing. This will balance the thermals on the de-
sign. Figure 21 shows a schematic of the parallel design.
The voltage feedback equation changes with the variable
n as modules are paralleled:
N is the number of paralleled modules.
Figure 21 shows two LTM4601AHV modules used in a
parallel design. An LTM4601AHV device can be used
without the diff amp.
Thermal Considerations and Output Current Derating
The power loss curves in Figures 7 and 8 can be used
in coordination with the load current derating curves in
Figures 9 to 16 for calculating an approximate θ
module with various heat sinking methods. Thermal models
are derived from several temperature measurements at
the bench and thermal modeling analysis. Thermal Ap-
plication Note 103 provides a detailed explanation of the
analysis for the thermal models and the derating curves.
Tables 3 and 4 provide a summary of the equivalent θ
for the noted conditions. These equivalent θ
are correlated to the measured values, and are improved
with air fl ow. The case temperature is maintained at 100°C
or below for the derating curves. The maximum case
temperature of 100°C is to allow for a rise of about 13°C
P
V
LDO_LOSS
OUT
=
0 6
.
= 20mA • (V
V
CC
60 4
. If there is a 5V rail in the system, it is
N
.
R
k
FB
+
R
IN
FB
CC
– 5V)
pin with an external circuit
CC
CC
pin to the external 5V
pin. A 5V output can
JA
parameters
JA
for the
4601ahvf
JA

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