ht82k70e-l Holtek Semiconductor Inc., ht82k70e-l Datasheet - Page 35

• Manufacturer Part Number: ht82k70e-l
• Description: I/o Type 8-bit Otp Mcu
• Manufacturer: Holtek Semiconductor Inc.

In the Master Mode, the Master will always generate the
clock signal. The clock and data transmission will be ini-
tiated after data has been written to the SBDR register.
In the Slave Mode, the clock signal will be received from
an external master device for both data transmission or
reception. The following sequences show the order to
be followed for data transfer in both Master and Slave
Mode:
Note:
Rev. 1.00
SPI_EN
Master Mode
Step 1. Select the clock source using the bit in
Step 2. Setup the M0 and M1 bits in the SBCR control
Step 3. Setup the CSEN bit and setup the MLS bit to
Step 4. Setup the SBEN bit in the SBCR control
Step 5. For write operations: write the data to the
Step 6. Check the WCOL bit, if set high then a
Step 7. Check the bit or wait for an SPI serial bus
Step 8. Read data from the SBDR register
Step 9. Clear
Step10. step 5
Slave Mode
Step 1. The CKS bit has a don t care value in the
0
1
1
1
1
1
X: don t care
(Z) floating
the SBCR control register
register to select the Master Mode and the
required Baud rate. Values of 00, 01 or 10 can
be selected.
this must be same as the Slave device.
register to enable the SPI interface.
data into the TXRX buffer. Then use the SCK
Goto to step 6.For read operations: the data
in the TXRX buffer until all the data has been
collision error has occurred so return to step5.
If equal to zero then go to the following step.
interrupt.
choose if the data is MSB or LSB first,
SBDR register, which will actually place the
and SCS lines to output the data.
transferred in on the SDI line will be stored
received at which point it will be latched into
the SBDR register.
slave mode.
Control Bit for Register
SPI_CSEN
x
0
0
1
1
1
SBEN
x
0
1
0
1
1
CSEN
0
1
x
x
x
x
SPI mode (Z)
SPI mode (Z)
SPI mode
I/O mode
I/O mode
I/O mode
SCS
35
SPI Configuration Options and Status Control
Several configuration options exist for the SPI Interface
function which must be setup during device programming.
One option is to enable the operation of the WCOL, write
collision bit, in the SBCR register. Another option exists to
select the clock polarity of the SCK line. A configuration
option also exists to disable or enable the operation of the
CSEN bit in the SBCR register. If the configuration option
disables the CSEN bit then this bit cannot be used to affect
overall control of the SPI Interface.
SPI include four pins , can share I/O mode status . The
status control combine with four bits for WSR and SBCR
register. Include SPI_CSEN , SPI_EN for WSR register
and CSEN, SBEN for SBCR register.
Step 2. Setup the M0 and M1 bits to 11 to select the
Step 3. Setup the CSEN bit and setup the MLS bit to
Step 4. Setup the SBEN bit in the SBCR control
Step 5. For write operations: write data to the SBCR
Step 6. Check the WCOL bit, if set high then a
Step 7. Check the bit or wait for an SPI serial bus
Step 8. Read data from the SBDR register
Step 9. Clear
Step10. step 5
SPI Share Function Pins Status
SPI mode (Z)
SPI mode (Z)
SPI mode
SPI mode
SPI mode
I/O mode
SCK
this must be same as the Master device.
register to enable the SPI interface.
register, which will actually place the data into
the TXRX register, then wait for the master
For read operations: the data transferred in
at which point it will be latched into the SBDR
collision error has occurred so return to step5.
If equal to zero then go to the following step.
interrupt.
Slave Mode. The CKS bit is don t care.
choose if the data is MSB or LSB first,
clock and SCS signal. After this goto step 6.
on the SDI line will be stored in the TXRX
buffer until all the data has been received
register.
HT82K70E-L/HT82K76E-L
SPI mode (Z)
SPI mode (Z)
SPI mode
SPI mode
SPI mode
I/O mode
SDO
September 15, 2009
SPI mode (Z)
SPI mode (Z)
SPI mode (Z)
SPI mode (Z)
SPI mode (Z)
I/O mode
SDI