ht82k70e-l Holtek Semiconductor Inc., ht82k70e-l Datasheet - Page 15

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ht82k70e-l

Manufacturer Part Number
ht82k70e-l
Description
I/o Type 8-bit Otp Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet
I/O Port Control Registers
Each I/O port has its own control register PAC, PBC,
PCC, PDC, PEC and PFC.0~PFC.2, to control the in-
put/output configuration. With this control register, each
CMOS output or input with or without pull-high resistor
structures can be reconfigured dynamically under soft-
ware control. Each of the I/O ports is directly mapped to a
bit in its associated port control register. Note that several
pins can be setup to have NMOS outputs using configu-
ration options.
For the I/O pin to function as an input, the corresponding
bit of the control register must be written as a 1 . This
will then allow the logic state of the input pin to be di-
rectly read by instructions. When the corresponding bit
of the control register is written as a 0 , the I/O pin will
be setup as an output. If the pin is currently setup as an
output, instructions can still be used to read the output
register. However, it should be noted that the program
will in fact only read the status of the output data latch
and not the actual logic status of the output pin.
Pin-shared Functions
The flexibility of the microcontroller range is greatly en-
hanced by the use of pins that have more than one func-
tion. Limited numbers of pins can force serious design
constraints on designers but by supplying pins with
multi-functions, many of these difficulties can be over-
come. For some pins, the chosen function of the
multi-function I/O pins is set by configuration options
while for others the function is set by application pro-
gram control.
Rev. 1.00
External Interrupt Input
The external interrupt pin INT is pin-shared with the
I/O pin PC2. For applications not requiring an external
interrupt input, the pin-shared external interrupt pin
can be used as a normal I/O pin, however to do this,
the external interrupt enable bits in the INTC0 register
must be disabled.
Generic Input/Output Structure
15
External Timer 0 Clock Input
The external timer pin TMR0 is pin-shared with the I/O
pin PA2. To configure this pin to operate as timer input,
the corresponding control bits in the timer control reg-
ister must be correctly set. For applications that do not
require an external timer input, this pin can be used as
a normal I/O pin. Note that if used as a normal I/O pin
the timer mode control bits in the timer control register
must select the timer mode, which has an internal
clock source, to prevent the input pin from interfering
with the timer operation.
External Timer1 Clock Input
The external timer pin TMR1 is pin-shared with the I/O
pin PA3. To configure this pin to operate as timer input,
the corresponding control bits in the timer control reg-
ister must be correctly set. For applications that do not
require an external timer input, this pin can be used as
a normal I/O pin. Note that if used as a normal I/O pin
the timer mode control bits in the timer control register
must select the timer mode, which has an internal
clock source, to prevent the input pin from interfering
with the timer operation.
V1/V2 is for V-axis function
The V1/V2 pins are pin shared with the PB0/PB1 pins,
PB0, PB1 has falling and rising edge wake-up func-
tion, if it select can wake-up by configuration option.
In HALT Mode if PB0 wake-up the V1-Wakeup [23H.4]
will be set, if PB1 wake-up the V2-Wakeup [23H.5] will
be set. If user read WSR register by software, the bit
will be clear.
Z1/Z2 is for Z-axis function
The Z1/Z2 pins are pin shared with the PA0/PA1 pins,
PA0, PA1 has falling and rising edge wake-up func-
tion, if it select can wake-up by configuration option. In
halt mode if PA0 wake-up the Z1-Wakeup [23H.6] will
be set, if PA1 wake-up the Z2-Wakeup [23H.7] will be
set. If user WSR register by software, the bit will be
clear.
HT82K70E-L/HT82K76E-L
September 15, 2009

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