a8292 Allegro MicroSystems, Inc., a8292 Datasheet

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a8292

Manufacturer Part Number
a8292
Description
Dual Lnb Supply And Control Voltage Regulator
Manufacturer
Allegro MicroSystems, Inc.
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
a8292SETTR-T
Manufacturer:
ALLEGRO/雅丽高
Quantity:
20 000
Company:
Part Number:
a8292SETTR-T
Quantity:
1 500
Features and Benefits
▪ 2-wire serial I
▪ LNB voltages (16 programmable levels) compatible with
▪ Tracking switch-mode power converter for lowest dissipation
▪ Integrated converter switches and current sensing
▪ Provides up to 500 mA per channel and 750 mA total
▪ Static current limit circuit allows full current at startup and
▪ Push-pull output stage minimizes 13
▪ Adjustable rise/fall time via external timing capacitor
▪ Built-in tone oscillator, factory-trimmed to 22 kHz
▪ Four methods of 22 kHz tone generation, via I
▪ 22 kHz tone detector facilitates DiSEqC™ 2.0 decoding
▪ Auxiliary modulation input
▪ LNB overcurrent with timer
▪ Diagnostics for output voltage level, input supply UVLO,
▪ Cable disconnect diagnostic
Package:
8292-DS, Rev. 7
28 pin 5 mm × 5mm MLP/QFN
(suffix ET)
status (read)
all common standards
13
output transition times for highly capacitive loads
facilitates DiSEqC™ tone encoding, even at no-load
bits and/or external pin
and DiSEqC™ tone output
V
V
S
DD
18 V output transition; reliably starts wide load range
R1
R2
100
C1
2
C™ -compatible interface: control (write) and
220 nF
C3
R3
nF
VREG
SDA
VIN
SCL
IRQ
100 μF
C2
A8292
Regulator
Compatible
Interface
I
2
C–
Dual LNB Supply and Control Voltage Regulator
A
Channel 1
Fault Monitor
DAC
TDO1
OCP1
OCP2
PNG1
PNG2
TSD
VUV
PAD
Fsw
Converter
EXTM1
Boost
R4
33 μH
L1
LNB
Voltage
Control
Oscillator
Fsw
18 V and 18
GND
R5
LX1
TCAP1
100 μF
C5
TGate1
Divider
Functional Block Diagram
D1
EXTM1
Clock
GNDLX1
Shape
Wave
22 kHz
TMode1
2
L3
1 H
C6
1 μF
C™ data
BOOST1
13 V
Linear
Stage
TDO1
VCP1
Tone
Detect
Charge
VPump
Pump
C 4
100 nF
LNB1
TCAP1
TDI1
D2
Description
Intended for analog and digital satellite receivers, this dual
low-noise block converter regulator (LNBR) is a monolithic
linear and switching voltage regulator, specifically designed to
provide the power and the interface signals to two LNB down
converters via coaxial cables. The A8292 requires few external
components, with the boost switches and compensation circuitry
integrated inside of the device. A high switching frequency is
chosen to minimize the size of the passive filtering components,
further assisting in cost reduction. The high level of component
integration ensures extremely low noise and ripple figures.
The A8292 has been designed for high efficiency, utilizing
the Allegro® advanced BCD process. The integrated boost
switches have been optimized to minimize both switching and
static losses. To further enhance efficiency, the voltage drop
across the tracking regulators has been minimized.
The A8292 has integrated tone detection capability, to support
full two-way DiSEqC™ communications. Several schemes
are available for generating tone signals, all the way down
to no-load, and using either the internal clock or an external
time source.
Continued on the next page…
C7
10 nF
100
R7
220 nF
C8
C10
10 nF
R8
30
C11
0.68 μF
B
220 μH
C12
R6
15
L2
220 nF
C9
D
D
C13
10 nF
D4
V
C
D3
OUT1
C
A
B
C
D
Channel 1 of 2 channels shown.
Either C12 or C9 should be used, but not both.
R8-C11 network is needed only when high
inductive load is applied, such as ProBrand LNB.
D3 and D4 are used for surge protection.
A8292

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a8292 Summary of contents

Page 1

... C™ data across the tracking regulators has been minimized. The A8292 has integrated tone detection capability, to support full two-way DiSEqC™ communications. Several schemes are available for generating tone signals, all the way down to no-load, and using either the internal clock or an external time source. Continued on the next page… ...

Page 2

... Contact Allegro for additional packing options. b Leadframe plating 100% matte tin. The device uses a 2-wire bidirectional serial interface, compatible with the I The A8292 is supplied in a lead (Pb) free 28-lead MLP/QFN with 100% matte tin leadframe plating. Symbol OUT ...

Page 3

... A8292 Dual LNB Supply and Control Voltage Regulator Terminal List Table Name Number GND – ADD 11 BOOST1 1 BOOST2 21 EXTM1 6 EXTM2 16 GND 8 PAD Pad GNDLX1 27 GNDLX2 23 IRQ 14 LNB1 28 LNB2 22 LX1 26 LX2 13, 18 SCL 12 SDA 10 TCAP1 3 TCAP2 19 TDI1 7 TDI2 15 TDO1 5 TDO2 17 VCP1 ...

Page 4

... A8292 Dual LNB Supply and Control Voltage Regulator ELECTRICAL CHARACTERISTICS Characteristics General Set-Point Accuracy, Load and Line Regulation Supply Current Boost Switch On Resistance Switching Frequency Switch Current Limit Linear Regulator Voltage Drop TCAP Pin Current Output Voltage Rise Time 2 Output Voltage Pull-Down Time ...

Page 5

... A8292 Dual LNB Supply and Control Voltage Regulator ELECTRICAL CHARACTERISTICS (continued) Characteristics Cable Disconnect Current Source Tone Tone Frequency Tone Amplitude, Peak-to-Peak Tone Duty Cycle Tone Rise Time Tone Fall Time EXTM Logic Input EXTM Input Leakage Tone Detector Tone Detect Input Amplitude Receive, Peak-to- ...

Page 6

... A8292 Dual LNB Supply and Control Voltage Regulator ELECTRICAL CHARACTERISTICS (continued) Characteristics I 2 C™ Address Setting ADD Voltage for Address 0001,000 ADD Voltage for Address 0001,001 ADD Voltage for Address 0001,010 ADD Voltage for Address 0001,011 1 Operation may be limited by power loss in the linear regulator. ...

Page 7

... Short Circuit Handling If the LNB output is shorted to ground, the LNB output current will be clamped to 600 mA, typical. If the short circuit condition lasts for more than 48 ms, the A8292 will be disabled and the OCP bit will be set. Auto-Restart After a short circuit condition occurs, the host controller should periodically re-enable the A8292 to check if the short circuit has been removed ...

Page 8

... Operating at this level for a longer period is not recommended. Tone Detection A 22 kHz tone detector is provided in each channel of the A8292 solution. The detector extracts the tone signal and provides open-drain signal on the TDO pins. The maximum tone out error is ± ...

Page 9

... This is a serial interface that uses two bus lines, SCL and SDA, to access the internal Control and Status registers of the A8292. Data is exchanged between a microcontroller (master) and the A8292 (slave). The clock input to SCL is generated by the master, while SDA functions as either an input or an open drain output, depending on the direction of the data. ...

Page 10

... Acknowledge bit, the A8292 responds by sending the data from register 2 to the master. Data bytes continue to be sent to the master until the master releases the SDA line during the Acknowl- edge bit. When this is detected, the A8292 stops sending data and waits for a stop signal. Interrupt Request The A8292 also provides an interrupt request pin, IRQ, which is an open-drain, active-low output ...

Page 11

... Once V REG point, the IRQ output goes active, and the VUV bit is set. After the A8292 acknowledges the address, the IRQ flag is reset. After the master reads the status registers, the registers are updated with the VUV reset. ...

Page 12

... Dual LNB Supply and Control Voltage Regulator Control Registers (I 2 C™-Compatible Write Register) All main functions of the A8292 are controlled through the I 2 C™-compatible interface via the 8-bit Control registers. As the A8292 contains numerous control options, as well as featuring two channels necessary to have four Control registers. Each Table 2 ...

Page 13

... A8292 Dual LNB Supply and Control Voltage Regulator Table 3. Control Registers with Address (I1, I0 and 11 Channel 1 Bit (Address Bit 0 TMODEx ToneMode. Selects between the use of an external 22 kHz logic signal or the use of the internal 22 kHz oscillator to control the tone generation on the LNBx output. ...

Page 14

... A8292 Dual LNB Supply and Control Voltage Regulator Table 4. Output Voltage Amplitude Selection VSEL VSEL VSEL ...

Page 15

... Status registers. In all fault cases, once the bit is set, it remains latched until the A8292 is read by the I master, assuming the fault has been resolved. The current status of each LNB output is indicated by the disable bit, DIS, for that channel ...

Page 16

... V occurred disabling the LNB outputs. The disable bits, DISx, will also be set, and the A8292 will not reenable the output until so instructed by writing the relevant bit into the control registers. The status of the undervoltage condition is sampled on the ris- ing edge of the 9 ger present, then the VUV bit will be reset allowing the master to reenable the LNB output if required ...

Page 17

... A8292 Dual LNB Supply and Control Voltage Regulator Table 7. Status Register 2 Bit Bit 0 CAD1 Cable between LNB and the LNB head is disconnected. When cable disconnect test mode is applied, the LNB linear regulator is disabled and current source is applied between the BOOST1 and LNB1 output. If the LNB volts rise above 21 V, CAD1 will be set to 1 ...

Page 18

... A8292 Dual LNB Supply and Control Voltage Regulator Table 8. Component Selection Table Component C3 220 nF C8 C12 220 nF X5R or X7R, 0805 C1, C4 100 nF X5R or X7R, 0603 C2, C5 100 μ nF C10, C13 10 nF X5R or X7R, 0402 or 0603 C11 0.68 μ ...

Page 19

... A8292 Dual LNB Supply and Control Voltage Regulator 29X 0.08 C +0.05 0.25 –0.07 +0.20 0.55 –0. C™ trademark of Philips Semiconductors. DiSEqC™ trademark of Eutelsat S.A. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec tions as may be required to permit improvements in the per for mance, reliability, or manufacturability of its products ...

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