lm80cimtx-5 National Semiconductor Corporation, lm80cimtx-5 Datasheet - Page 17

• Manufacturer Part Number: lm80cimtx-5
• Description: Serial Interface Acpi-compatible Microprocessor System Hardware Monitor
• Manufacturer: National Semiconductor Corporation

Functional Description
By default Temperature Register data is represented by a
9-bit two’s complement digital word with the LSB having a
resolution of 0.5˚C:
Temperature Register data can also be represented by a
12-bit two’s complement digital word with a LSB of 0.0625˚C:
The 8 MSBs of the Temperature reading can be found at
Value RAM address 28 h. The remainder of the Temperature
reading can be found in the OS Configuration/Temperature
Resolution Register bits 7-4. In 9-bit format bit 7 is the only
valid bit.
Temperature
Temperature
+0.0625˚C
−0.0625˚C
+125˚C
+125˚C
+1.5˚C
−0.5˚C
+1.0˚C
−1.0˚C
+25˚C
−25˚C
−55˚C
+25˚C
−25˚C
−55˚C
+0˚C
0˚C
0111 1100 0000
0001 1001 0000
0000 0001 0000
0000 0000 0001
0000 0000 0000
1111 1111 1111
1111 1111 0000
1110 0111 0000
1100 1001 0000
0 1111 1010
0 0011 0010
0 0000 0011
0 0000 0000
1 1111 1111
1 1100 1110
1 1001 0010
Binary
Binary
Digital Output
Digital Output
(Continued)
1 CEh
0 FAh
0 32h
0 03h
0 00h
1 FFh
1 92h
7 D0h
F FFh
C 90h
1 90h
0 10h
0 01h
F F0h
E 70h
Hex
Hex
00h
17
7.2 Temperature Interrupts
There are four Value RAM WATCHDOG limits for the Tem-
perature reading that affect the INT and OS outputs of the
LM80. They are: Hot Temperature Limit, Hot Temperature
Hysteresis Limit, OS Limit, OS Hysteresis Limit. There are
three interrupt modes of operation: “One-Time Interrupt”
mode, “Default Interrupt” mode, and “Comparator Mode”.
The OS output of the LM80 can be programmed for
“One-Time Interrupt” mode and “Comparator” mode. INT can
be programmed for “Default Interrupt” mode and “One-Time”
Interrupt.
“Default Interrupt mode” operates in the following way:
Exceeding T
indefinitely until reset by reading Interrupt Status Register 1
or cleared by the INT_Clear bit in the Configuration register.
Once an Interrupt event has occurred by crossing T
reset, an Interrupt will occur again once the next temperature
conversion has completed. The interrupts will continue to
occur in this manner until the temperature goes below T
hyst
clear.
“One-Time Interrupt” mode operates in the following way:
Exceeding T
indefinitely until reset by reading Interrupt Status Register 1
or cleared by the INT_Clear bit in the Configuration register.
Once an Interrupt event has occurred by crossing T
reset, an Interrupt will not occur again until the temperature
goes below T
“Comparator” mode operates in the following way: Ex-
ceeding T
will remain Low until the temperature goes below T
the temperature goes below T
, at which time the Interrupt output will automatically
os
causes the OS output to go Low (default). OS
hot
hot
hot hyst
causes an Interrupt that will remain active
causes an Interrupt that will remain active
.
os
, OS will go High.
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os
hot
hot
. Once
, then
, then
hot