ap1250cmp APEC, ap1250cmp Datasheet - Page 3

• Manufacturer Part Number: ap1250cmp
• Description: 2a Sink/source Bus Termination Regulator
• Manufacturer: APEC

Application Information
Input Capacitor and Layout Consideration
Place the input bypass capacitor as close as
possible to the AP1250CMP. A low ESR capacitor
larger than 470uF is recommended for the input
capacitor. Use short and wide traces to minimize
parasitic resistance and inductance.
Inappropriate layout may result in large parasitic
inductance
between AP1250CMP and the preceding power
converter.
Consideration while designs the resistance of
voltage divider
Make sure the sinking current capability of
pull-down NMOS if the lower resistance was
chosen so that the voltage on V
In addition, the capacitor and voltage divider form
the lowpass filter. There are two reasons doing this
design; one is for output voltage soft-start while
another is for noise immunity.
Advanced Power
Electronics Corp.
and
cause
undesired
REFEN
is below 0.2V.
oscillation
Thermal Consideration
AP1250CMP regulators have internal thermal limiting
circuitry designed to protect the device during
overload conditions.For continued operation, do not
exceed maximum operation junction temperature
125℃. The power dissipation definition in device is:
P
The maximum power dissipation depends on the
thermal resistance of IC package, PCB layout, the
rate of surroundings airflow and temperature
difference between junction to ambient. The
maximum power dissipation can be calculated by
following formula:
P
Where T
temperature 125℃, T
and the Θ
resistance. The junction to ambient thermal
resistance (Θ
package (Exposed Pad) is 75℃/W on standard
JEDEC 51-7 (4 layers, 2S2P) thermal test board.
The maximum power dissipation at T
be calculated by following formula:
P
The thermal resistanceΘ
Pad) is determined by the package design and the
PCB design. However, the package design has
been decided. If possible, it's useful to increase
thermal performance by the PCB design. The
thermal resistance can be decreased by adding
copper under the expose pad of ESOP-8 package.
We have to consider the copper couldn't stretch
infinitely and avoid the tin overflow.
D
D(MAX)
D(MAX)
= (V
IN
= ( T
= (125℃ - 25℃) / 75℃/W = 1.33W
J(MAX)
- V
JA
OUT
J(MAX)
JA
is the junction to ambient thermal
is the maximum operation junction
) x I
is layout dependent) for ESOP-8
-T
OUT
AP1250CMP
A
) /Θ
A
+ V
is the ambient temperature
JA
IN
JA
x I
of ESOP-8 (Exposed
Q
A
= 25℃ can
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