tmp89fh40 TOSHIBA Semiconductor CORPORATION, tmp89fh40 Datasheet - Page 179
tmp89fh40
Manufacturer Part Number
tmp89fh40
Description
8 Bit Microcontroller Tlcs-870/c1 Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FH40.pdf
(426 pages)
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RB002
13.4.5
13.4.5.1
13.4.5.2
to the TCA0 pin and measures the input pulse width based on the internal clock.
In the pulse width measurement mode, the up counter starts counting at the rising/falling edge(s) of the input
Pulse width measurement mode
mode. Select the source clock at TA0MOD<TA0CK>.
TA0MOD<TA0TED> to "0" selects the rising edge, and setting it to "1" selects the falling edge as a trigger
to start the capture.
TA0MOD<TA0MCAP>. Setting TA0MOD<TA0MCAP> to "0" selects the double-edge capture. Setting
TA0MOD<TA0MCAP> to "1" selects the single-edge capture.
interrupt control TA0CR<TA0OVE>. Setting TA0OVE to "1" makes an INTTCA0 interrupt request occur
in case of an overflow. Setting TA0OVE to "0" makes no INTTCA0 interrupt request occur in case of an
overflow.
in port settings.
are initialized to "0x0000". After the timer is started, writing to TA0MOD and TA0CR<TA0OVE> is disabled.
Be sure to complete the required mode settings before starting the timer.
interrupt request is generated, and then the up counter increments according to the selected source clock.
Subsequently, when the edge opposite to the selected edge is detected, the up counter value is captured into
TA0DRB, an INTTCA0 interrupt request is generated, and TA0SR<TA0CPFB> is set to "1". Depending on
the TA0MOD<TA0MCAP> setting, the operation differs as follows:
this time, an INTTCA0 interrupt request occurs if the overflow interrupt control TA0CR<TA0OVE> is set
to "1".
(TA0SR<TA0OVF>) are cleared to "0" automatically when TA0SR is read.
Setting the operation mode selection TA0MOD<TA0M> to "110" activates the pulse width measurement
Select the trigger edge at the trigger edge input selection TA0MOD<TA0TED>. Setting
The operation after capturing is determined by the pulse width measurement mode control
The operation to be executed in case of an overflow of the up counter can be selected at the overflow
Note that this mode uses the TA0 input pin, and the TCA0 pin must be set to the input mode beforehand
The operation is started by setting TA0CR<TA0S> to "1". In this time, TA0DRA and TA0DRB register
After the timer is started, when the selected trigger edge (start edge) is input to the TCA0 pin, INTTCA0
When the up counter overflows during capturing, the overflow flag TA0SR<TA0OVF> is set to "1". At
The
Setting
Operation
・ Double-edge capture (When TA0MOD<TA0MCAP> is "0")
・ Single-edge capture (When TA0MOD<TA0MCAP> is "1")
capture
Subsequently, when the selected trigger edge is input, the up counter value is captured into
TA0DRA, an INTTCA0 interrupt request is generated, and TA0SR<TA0CPFA> is set to "1". At
this time, the up counter is cleared to "0x0000".
selected edge is detected. Subsequently, when the start edge is input, INTTCA0 interrupt request
is generated, and then the up counter restarts increment.
The up counter continues counting up after the edge opposite to the selected edge is detected.
The up counter stops counting up and is cleared to "0x0000" when the edge opposite to the
completion
flags
(TA0SR<TA0CPFA,
Page 165
TA0CPFB>
and
the
TMP89FH40
overflow
flag
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