tmp89fh40 TOSHIBA Semiconductor CORPORATION, tmp89fh40 Datasheet - Page 181
tmp89fh40
Manufacturer Part Number
tmp89fh40
Description
8 Bit Microcontroller Tlcs-870/c1 Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FH40.pdf
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RB002
13.4.5.3
INTTCA0 interrupt
TA0DRB read
Capture value
<TA0CPFB>
or overflow state can be easily judged by status register (TA0SR).
TA0SR read
<TA0OVF>
Interrupt process for single-edge capture
subroutin
handling
TA0SR
TA0SR
Figure 13-8 shows an example of the capture process for INTTCA0 interrupt subroutine. The capture edge
RETI
Capture process
0 (No overflow)
1 (Capture)
1
Overflow
0
No capture
Figure 13-8 Example of capture process
Error handling
Page 167
INTTCA0 interrupt
TA0DRB read
TA0DRA read
Capture value
<TA0CPFB>
<TA0CPFA>
TA0SR read
<TA0OVF>
subroutine
handling
Interrupt process for double-edge capture
TA0SR
TA0SR
TA0SR
RETI
0 (No overflow)
1 (Capture)
1 (Capture)
1
Overflow
0
No Capture
0
No Capture
Error handling
TMP89FH40
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