bd616lv4017eip70 Brillance Semiconductor, bd616lv4017eip70 Datasheet

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bd616lv4017eip70

Manufacturer Part Number
bd616lv4017eip70
Description
Very Low Power Cmos Sram 256k X 16 Bit
Manufacturer
Brillance Semiconductor
Datasheet
n FEATURES
Ÿ Wide V
Ÿ Very low power consumption :
Ÿ High speed access time :
Ÿ Automatic power down when chip is deselected
Ÿ Easy expansion with CE and OE options
Ÿ I/O Configuration x8/x16 selectable by LB and UB pin.
Ÿ Three state outputs and TTL compatible
Ÿ Fully static operation
Ÿ Data retention supply voltage as low as 1.5V
n POWER CONSUMPTION
n PIN CONFIGURATIONS
R0201-BS616LV4017
Brilliance Semiconductor, Inc.
V
V
-55
-70
BS616LV4017DC
BS616LV4017AC
BS616LV4017EC
BS616LV4017AI
BS616LV4017EI
CC
CC
PRODUCT
= 3.0V
= 5.0V
FAMILY
CC
operation voltage : 2.4V ~ 5.5V
55ns(Max.) at V
70ns(Max.) at V
DQ0
DQ1
DQ2
DQ3
VCC
VSS
DQ4
DQ5
DQ6
DQ7
A
B
C
D
E
F
G
H
A17
A16
A15
A14
A13
WE
CE
A4
A3
A2
A1
A0
VSS
VCC
Operation current : 27mA (Max.) at 55ns
Standby current :
Operation current : 65mA (Max.) at 55ns
Standby current :
D14
D15
NC
LB
D8
D9
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
TEMPERATURE
D10
D11
D12
D13
OE
UB
NC
A8
-40
2
48-ball BGA top view
+0
BS616LV4017EC
BS616LV4017EI
OPERATING
Commercial
O
Industrial
O
CC
CC
C to +70
A17
A14
A12
C to +85
NC
A0
A3
A5
A9
3
=3.0~5.5V
=2.7~5.5V
Pb-Free and Green package materials are compliant to RoHS
Very Low Power CMOS SRAM
256K X 16 bit
A16
A15
A13
A10
A1
A4
A6
A7
4
O
O
C
C
0.25uA (Typ.) at 25
10mA (Max.) at 1MHz
1.5uA (Typ.) at 25
WE
A11
CE
A2
D1
D3
D4
D5
5
2mA (Max.) at 1MHz
V
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
VCC
VSS
NC
NC
D0
D2
D6
D7
CC
6
10uA
20uA
=5.0V
STANDBY
(I
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
VSS
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
A12
CCSB1
reserves the right to modify document contents without notice.
, Max)
V
2.0uA
4.0uA
CC
=3.0V
O
O
C
C
10mA
1MHz
9mA
1
POWER DISSIPATION
n DESCRIPTION
The BS616LV4017 is a high performance, very low power CMOS
Static Random Access Memory organized as 262,144 by 16 bits and
operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical CMOS standby
current of 0.25uA at 3.0V/25
3.0V/85
Easy memory expansion is provided by an active LOW chip enable
(CE) and active LOW output enable (OE) and three-state output
drivers.
The BS616LV4017 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS616LV4017 is available in DICE form, JEDEC standard
44-pin TSOP II and 48-ball BGA package.
n BLOCK DIAGRAM
V
10MHz
39mA
40mA
CC
DQ15
DQ0
A12
A10
A11
=5.0V
WE
OE
V
V
CE
UB
A9
A8
A5
A6
A7
A4
A3
LB
.
.
.
.
.
.
CC
SS
O
C.
.
.
.
.
.
.
63mA
65mA
Address
Buffer
f
Input
Max.
Operating
Control
(I
16
16
CC
, Max)
10
1.5mA
1MHz
2mA
Output
O
Buffer
Buffer
Input
Data
Data
C and maximum access time of 55ns at
Decoder
Row
V
10MHz
14mA
15mA
CC
BS616LV4017
16
=3.0V
16
1024
A13
26mA
27mA
f
Max.
A14
Address Input Buffer
A15
Column Decoder
Memory Array
1024 x 4096
Write Driver
Column I/O
Sense Amp
Revision
May.
A16
DICE
BGA-48-0608
TSOP II-44
BGA-48-0608
TSOP II-44
PKG TYPE
A17
4096
256
8
A0 A1
2006
A2
1.3

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bd616lv4017eip70 Summary of contents

Page 1

Very Low Power CMOS SRAM 256K X 16 bit Pb-Free and Green package materials are compliant to RoHS n FEATURES Ÿ Wide V operation voltage : 2.4V ~ 5.5V CC Ÿ Very low power consumption : V = 3.0V Operation ...

Page 2

PIN DESCRIPTIONS Name A0-A17 Address Input CE Chip Enable Input WE Write Enable Input OE Output Enable Input LB and UB Data Byte Control Input DQ0-DQ15 Data Input/Output Ports TRUTH TABLE MODE CE H ...

Page 3

ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER Terminal Voltage with V TERM Respect to GND Temperature Under T BIAS Bias T Storage Temperature STG P Power Dissipation Output Current OUT 1. Stresses greater than those listed under ABSOLUTE ...

Page 4

DATA RETENTION CHARACTERISTICS (T SYMBOL PARAMETER V V for Data Retention DR CC (3) I Data Retention Current CCDR Chip Deselect to Data t CDR Retention Time t Operation Recovery Time =1.5V, T =25 C ...

Page 5

AC ELECTRICAL CHARACTERISTICS (T READ CYCLE JEDEC PARANETER PARAMETER NAME NAME t t Read Cycle Time AVAX Address Access Time AVQX AA Chip Select Access Time t t ELQV ACS Data Byte Control Access Time t ...

Page 6

READ CYCLE OUT (1, 4) READ CYCLE 3 ADDRESS OUT NOTES high in read Cycle. 2. Device is continuously selected when Address ...

Page 7

AC ELECTRICAL CHARACTERISTICS (T WRITE CYCLE JEDEC PARANETER PARAMETER NAME NAME t t Write Cycle Time AVAX Address Set up Time AVWL Address Valid to End of Write AVWH AW Chip Select to ...

Page 8

WRITE CYCLE 2 ADDRESS CE LB OUT D IN NOTES must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE and WE low. ...

Page 9

ORDERING INFORMATION BS616LV4017 Note: BSI (Brilliance Semiconductor Inc.) assumes no responsibility for the application or use of any product or circuit described herein. BSI does not authorize its products for use as critical components in any application in which ...

Page 10

PACKAGE DIMENSIONS (continued) D1 VIEW A 48 mini-BGA (6 x 8mm) R0201-BS616LV4017 NOTES : 1: CONTROLLING DIMENSIONS ARE IN MILLIMETERS. 2: PIN#1 DOT MARKING BY LASER OR PAD PRINT. 3: SYMBOL "N" IS THE NUMBER OF SOLDER BALLS. BALL ...

Page 11

Revision History Revision No. History 1.2 Add Icc1 characteristic parameter Improve Iccsb1 spec. I-grade from 60uA to 20uA at 5.0V C-grade from 30uA to 10uA at 5.0V 1.3 Change I-grade operation temperature range - from –25 O R0201-BS616LV4017 10uA ...

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