ncp3030a ON Semiconductor, ncp3030a Datasheet - Page 14

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ncp3030a

Manufacturer Part Number
ncp3030a
Description
Ncp3030a, Ncp3030b Synchronous Pwm Controller
Manufacturer
ON Semiconductor
Datasheet

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the low side MOSFET is off for the majority of the switching
period. Reduced sampling time causes errors in the
regulated voltage on the boost pin. High duty cycle / input
voltage induced sampling errors can result in increased
boost ripple voltage or higher than desired DC boost voltage.
Figure 28 outlines all operating regions.
Region 1 (Green) where a 0.1 mF, 25 V ceramic capacitor
can be placed on the boost pin without causing damage to the
device or MOSFETS. Larger boost ripple voltage occurring
over several switching cycles is shown in Region 2 (Yellow).
Reduced sampling time occurs at high duty cycles where
The recommended operating conditions are shown in
Figure 28. Safe Operating Area for Boost Voltage with a 0.1 mF Capacitor
28
26
24
22
20
18
16
14
12
10
8
6
4
2
Normal Operation
5
10
15
20
25
Boost Voltage Levels
30
http://onsemi.com
35
Increased Boost Ripple
(Still in Specification)
Region 1
40
11.5V
22V
Duty Cycle
14
45
The boost ripple frequency is dependent on the output
capacitance selected. The ripple voltage will not damage the
device or $12 V gate rated MOSFETs.
damage the device or $12 V gate rated MOSFETs can be
seen in Region 3 (Orange). Placing a boost capacitor that is
no greater than 10X the input capacitance of the high side
MOSFET on the boost pin limits the maximum boost
voltage < 12 V. The typical drive waveforms for Regions 1,
2 and 3 (green, yellow, and orange) regions of Figure 28 are
shown in Figure 29.
50
Conditions where maximum boost ripple voltage could
55
60
65
70
Increased Boost Ripple
Capacitor Optimization
71%
Region 2
Region 3
75
Required
80
85
Cycle
Duty
Max
Cycle
mum
Maxi
Duty
90

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