tea1752t NXP Semiconductors, tea1752t Datasheet - Page 6

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tea1752t

Manufacturer Part Number
tea1752t
Description
Greenchip Iii Smps Control Ic
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
7. Functional description
TEA1752T_LT
Product data sheet
Fig 3.
Typical configuration
7.1.1 Start-up and UnderVoltage LockOut (UVLO)
7.1 General control
compensation
VINSENSE
PFCCOMP
R AUX1
PFCAUX
FBCTRL
The TEA1752(L)T contains controllers for a power factor correction circuit and for a
flyback circuit. A typical configuration is shown in
Initially the capacitor on the V
If V
shorted to ground. The charge current above V
to achieve a short start-up time. If V
is low again, ensuring a low duty cycle during fault conditions.
The control logic activates the internal circuitry and switches off the HV charge current
when the voltage on pin V
then activated and the soft start capacitors on pins PFCSENSE and FBSENSE are
charged and the clamp circuit on pin PFCCOMP is activated. When the LATCH pin
voltage exceeds V
start capacitor on pin PFCSENSE pin is charged, the PFC circuit is activated. The flyback
CC
R LOOP
C TIMEOUT
is lower than V
12
8
6
7
3
PFCDRIVER
C SS1
R S1
All information provided in this document is subject to legal disclaimers.
11
2
en(LATCH)
GND
PFCSENSE
R SENSE1
trip
R SS1
TEA1752(L)T
Rev. 02 — 24 June 2010
, the charge current is low. This protects the IC if the V
CC
, the PFCCOMP pin voltage exceeds V
S1
passes the V
CC
D1
9
VOSENSE
pin is charged from the high voltage mains via the HV pin.
14
PFCTIMER
CC
is between V
16
HV
TEA1752T; TEA1752LT
startup
13
FBTIMER
trip
level. The LATCH pin current source is
10
Figure
4
1
5
is increased until V
th(UVLO)
FBAUX
FBSENSE
V
LATCH
R S2
CC
3.
R SENSE2
GreenChip III SMPS control IC
C SS2
R SS2
and V
C bus
Θ
startup
S2
en(PFCCOMP)
R AUX2
CC
T2
, the charge current
© NXP B.V. 2010. All rights reserved.
reaches V
C OUT
D2
C VCC
and the soft
CC
014aaa750
pin is
th(UVLO)
6 of 34

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