tea1752t NXP Semiconductors, tea1752t Datasheet - Page 17

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tea1752t

Manufacturer Part Number
tea1752t
Description
Greenchip Iii Smps Control Ic
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
TEA1752T_LT
Product data sheet
7.3.4 Demagnetization (FBAUX pin)
7.3.5 Flyback control/time-out (FBCTRL pin)
The system is always in quasi-resonant or discontinuous conduction mode. The internal
oscillator does not start a new primary stroke until the previous secondary stroke has
ended.
Demagnetization features a cycle-by-cycle output short circuit protection by immediately
lowering the frequency (longer off-time), thus reducing the power level.
Demagnetization recognition is suppressed during the first t
This suppression may be necessary at low output voltages and at start-up and in
applications where the transformer has a large leakage inductance.
If pin FBAUX is open circuit or not connected, a fault condition is assumed and the
converter stops operating immediately. Operation restarts as soon as the fault condition is
removed.
The pin FBCTRL is connected to an internal voltage source of 3.5 V via an internal
resistor (typical resistance is 3 kΩ). As soon as the voltage on this pin rises above
2.5 V (typical), this connection is disabled. Above 2.5 V the pin is biased with a small
current. When the voltage on this pin rises above 4.5 V (typical), a fault is assumed and
switching is inhibited. In the TEA1752T a restart will then be made, while in the
TEA1752LT the protection will be latched.
When a small capacitor is connected to this pin, a time-out function can be created to
protect against an open control loop situation. (see
function can be disabled by connecting a resistor (100 kΩ) to ground on the FBCTRL pin.
If the pin is shorted to ground, switching of the flyback controller is inhibited.
In normal operating conditions, when the converter is regulating the output voltage, the
voltage on the FBCTRL pin is between 1.4 V (typical) and 2.0 V (typical) from minimum to
maximum output power.
Fig 11. Peak current control of flyback part
V
peak voltage
sense(fb)max
FBSENSE
All information provided in this document is subject to legal disclaimers.
0.325 V
0.65 V
Rev. 02 — 24 June 2010
cycle skip
flyback
mode
flyback
frequency
reduction
PFC off
TEA1752T; TEA1752LT
PFC on
1.5 V
2.0 V
discontinuous
Figure 12
flyback
or QR
V
FBCTRL
GreenChip III SMPS control IC
SENSE resistor
sup(xfmr_ring)
peak voltage
and
Figure
offset voltage
FBSENSE
014aaa747
time (2 μs typical).
© NXP B.V. 2010. All rights reserved.
13) The time-out
17 of 34

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