hmp8117 Intersil Corporation, hmp8117 Datasheet - Page 33

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hmp8117

Manufacturer Part Number
hmp8117
Description
Ntsc/pal Video Decoder
Manufacturer
Intersil Corporation
Datasheet

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15-8
NO.
NO.
NO.
NO.
BIT
BIT
BIT
BIT
1-0
7-0
7-0
7
6
5
4
3
2
Software Reset
Power Down
Closed Caption
Odd Field
Read Status
Closed Caption
Even Field
Read Status
WSS
Odd Field
Read Status
WSS
Even Field
Read Status
Reserved
Odd Field
Caption Data
Odd Field
Caption Data
Even Field
Caption Data
FUNCTION
FUNCTION
FUNCTION
FUNCTION
33
When this bit is set to 1, the entire device except the I
like the RESET input going active. The software reset will initialize all register bits to their reset
state. Once set this bit is self clearing. This bit is cleared on power-up by the external RESET pin.
When this bit is set to a 1, the entire device is shut down except the I
clock. For normal decoding operations this bit should be set to a 0.
This bit is read-only. Data written to this bit is ignored. The bit is cleared when the caption data
has been read out via the I
0 = No new caption data
1 = Caption_ODD_A and Caption_ODD_B data registers contain new data.
This bit is read-only. Data written to this bit is ignored. The bit is cleared when the caption data
has been read out via the I
0 = No new caption data
1 = Caption_EVEN_A and Caption_EVEN_B data registers contain new data.
This bit is read-only. Data written to this bit is ignored. The bit is cleared when the WSS data has
been read out via the I
0 = No new WSS data
1 = WSS_ODD_A and WSS_ODD_B data registers contain new data.
This bit is read-only. Data written to this bit is ignored. The bit is cleared when the WSS data has
been read out via the I
0 = No new WSS data
1 = WSS_EVEN_A and WSS_EVEN_B data registers contain new data.
If odd field captioning is enabled and present, this register is loaded with the first eight bits of
caption data on line 18, 21, or 22. Bit 0 corresponds to the first bit of caption information. Data
written to this register is ignored.
If odd field captioning is enabled and present, this register is loaded with the second eight bits of
caption data on line 18, 21, or 22. Data written to this register is ignored.
If even field captioning is enabled and present, this register is loaded with the first eight bits of
caption data on line 281, 284, or 335. Bit 0 corresponds to the first bit of caption information. Data
written to this register is ignored.
TABLE 44. CLOSED CAPTION_EVEN_A DATA REGISTER
TABLE 42. CLOSED CAPTION_ODD_A DATA REGISTER
TABLE 43. CLOSED CAPTION_ODD_B DATA REGISTER
TABLE 41. HOST CONTROL REGISTER
2
2
C interface or as BT.656 ancillary data.
C interface or as BT.656 ancillary data.
SUB ADDRESS = 1F
SUB ADDRESS = 21
SUB ADDRESS = 20
SUB ADDRESS = 22
2
2
C interface or as BT.656 ancillary data.
C interface or as BT.656 ancillary data.
HMP8117
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
H
H
H
H
2
C bus is reset to a known state exactly
2
C bus by gating off the
April 19, 2007
RESET
RESET
RESET
RESET
STATE
STATE
STATE
STATE
00
80
80
80
0
0
0
0
0
0
FN4643.3
B
B
B
B
B
B
B
H
H
H

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