mpc5566 Freescale Semiconductor, Inc, mpc5566 Datasheet - Page 64

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mpc5566

Manufacturer Part Number
mpc5566
Description
Mpc5566 High Performance Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Revision History for the MPC5566 Data Sheet
64
Location
Table
Table
26, DSPI Timing:
22, Bus Operation Timing:
• External Bus Frequency in the table heading: Added footnote that reads: Speed is the nominal maximum
• Spec 1: Changed the values in Min. columns: 40 MHz from 25 to 24.4; 56 MHz from 17.9 to 17.5
• Specs 7 and 8: Removed from external bus interface: BDIP, OE, TSIZ[0:1], and WE/BE[0:3].
• Table Title: Added footnote that reads: Speed is the nominal maximum frequency. Max speed is the maximum
• Removed footnote that reads: “Specification pending final characterization.”
• Spec 2, PCS to SCK delay, 144 MHz, min. 12
• Spec 3, After SCK delay, 144 MHz, min. 11
• Spec 9, Master (MTFE = 1, CPHA = 0), 144 MHz, min. 7
• Spec 10, Master (MTFE = 1, CPHA = 0), 144 MHz, min. 11
• Spec 11, Master (MTFE = 1, CPHA = 0), 144 MHz, max. 12
• Spec 12, Master (MTFE = 1, CPHA = 0), 144 MHz, min. 1
frequency. Max speed is the maximum speed allowed including frequency modulation (FM). 82 MHz parts allow
for 80 MHz system clock + 2% FM; 114 MHz parts allow for 112 MHz system clock + 2% FM, 135 MHz parts
allow for 132 MHz system clock + 2% FM; and 147 MHz parts allow for 144 MHz system clock + 2% FM.
speed allowed including frequency modulation (FM). 82 MHz parts allow for 80 MHz system clock + 2% FM;
114 MHz parts allow for 112 MHz system clock + 2% FM, 135 MHz parts allow for 132 MHz system clock + 2%
FM; and 147 MHz parts allow for 144 MHz system clock + 2% FM.
Table 34. Table Changes Between Rev. 1.0 and 2.0 (continued)
MPC5566 Microcontroller Data Sheet, Rev. 2.0
Description of Changes
Freescale Semiconductor

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