mpc5645s Freescale Semiconductor, Inc, mpc5645s Datasheet - Page 34

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mpc5645s

Manufacturer Part Number
mpc5645s
Description
Mpc5645s Microcontroller Data Sheet
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Pinout and signal descriptions
1
2
2.4.6
The DCU3, DCULite and VIU2 modules share the same pins for input video. It is, however, possible to feed independent video
streams to VIU2 and DCU3 (operating in narrow mode).
34
DDR_CAS
DDR_RAS
DDR_WEB
DDR_ODT
DDR_CLK
DDR_CLKB
DDR_CK
DDR_CS
MVREF
MVTT
These port pins are disabled and unpowered on packages where the DRAM interface is not bonded out.
Reset configuration is given as I/O direction and pull direction (for example, “Input, pullup”).
Port pin
1
VIU muxing
Column Address Strobe
Row Address Strobe
Write Enable
DRAM On-die termination
DRAM Clock
DRAM Clock bar
DRAM Clock Enable
DRAM Chip Select
DDR Reference Voltage
DRAM Termination Voltage
Function
Table 6. DRAM interface pin summary (continued)
MPC5645S Microcontroller Data Sheet, Rev. 6
Figure 5
direction
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
I/O
explains the pin sharing arrangement.
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
type
Pad
PCR[221]
PCR[227]
PCR[228]
PCR[226]
PCR[225]
PCR[222]
PCR[223]
PCR
NA
NA
NA
Pull Down
Pull Down
config
RESET
Output,
Output,
Output,
Output,
Output,
Output,
Output,
Output,
None
None
None
None
None
None
Freescale Semiconductor
2
416 TEPBGA
F2,J2,M2,R2
Pin number
D5
C7
D7
D8
D9
B6
B7
B9
J4

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