mpc5645s Freescale Semiconductor, Inc, mpc5645s Datasheet

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mpc5645s

Manufacturer Part Number
mpc5645s
Description
Mpc5645s Microcontroller Data Sheet
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Freescale Semiconductor
Data Sheet: Technical Data
MPC5645S Microcontroller
Data Sheet
• Dual-issue, 32-bit Power Architecture Book E compliant
• 2 MB on-chip ECC flash memory with:
• 64 KB on-chip ECC SRAM
• 1 MB on-chip non-ECC graphics SRAM with two-port
• Memory Protection Unit (MPU) with up to 16 region
• Interrupt Controller (INTC) with 181 peripheral interrupt
• Two Frequency-Modulated Phase-Locked Loops
• Crossbar switch architecture enables concurrent access of
• 16-channel Enhanced Direct Memory Access controller
• Boot Assist Module (BAM) with 8 KB dedicated ROM for
• Two Display Control Units (DCU3 and DCULite) for
© Freescale Semiconductor, Inc., 2010-2011. All rights reserved.
Freescale reserves the right to change the detail specifications as may be required to permit
improvements in the design of its products.
CPU core complex (e200z4d)
– Memory Management Unit (MMU)
– 4 KB, 2/4-way instruction cache
– Flash memory controller
– Prefetch buffers
graphics SRAM controller
descriptors and 32-byte region granularity to provide basic
memory access permission and ensure separation between
different codes and data
sources and eight software interrupts
(FMPLLs)
– Primary FMPLL (FMPLL0) provides a system clock up
– Auxiliary FMPLL (FMPLL1) is available for use as an
peripherals, flash memory or RAM from multiple bus
masters
(eDMA) with multiple transfer request sources using a
DMA channel multiplexer
embedded boot code supports boot options including
download of boot code via a serial link (CAN or SCI)
direct drive of up to two TFT LCD displays up to XGA
resolution
to 125 MHz
alternate, modulated or non-modulated clock source to
eMIOS modules, QuadSPI and as alternate clock to the
DCU and DCU-Lite for pixel clock generation
• Timing Controller (TCON) and RSDS interface for the
• 2D OpenVG 1.1 and raster graphics accelerator (GFX2D)
• Video Input Unit (VIU2) supporting 8/10-bit ITU656 video
• DRAM controller supporting DDR1, DDR2, and LPDDR1
• Stepper Motor Controller (SMC)
• Sound Generator Module (SGM)
• Two 16-channel Enhanced Modular Input Output System
• 10-bit Analog-to-Digital Converter (ADC) with a
• Three Deserial Serial Peripheral Interface (DSPI) modules
• QuadSPI serial flash memory controller
DCU3 module
input, YUV to RGB conversion, video down-scaling,
de-interlacing, contrast adjustment and brightness
adjustment.
DRAMs
– High-current drivers for up to six instrument cluster
– Stepper motor return-to-zero and stall detection module
– Stepper motor short circuit detection
– 4-channel mixer
– Supports PCM wave playback and synthesized tones
– Optional PWM or I
(eMIOS) modules
– Support a range of 16-bit Input Capture, Output
maximum conversion time of 1 s
– Up to 20 internal channels
– Up to 8 external channels
for full-duplex, synchronous, communications with
external devices
– Supports single, dual and quad IO serial flash memory
– Interfaces to external, memory-mapped serial flash
– Supports simultaneous addressing of 2 external serial
gauges driven in full dual H-bridge configuration
Compare, Pulse Width Modulation and Quadrature
Decode functions
memories
flashes to achieve up 80 MB/s read bandwidth
416 TEPBGA
27 mm x 27 mm
176 LQFP
24 mm x 24 mm
MPC5645S
Document Number: MPC5645S
2
S outputs
Rev. 6, 08/2011
208 LQFP
28 mm x 28 mm

Related parts for mpc5645s

mpc5645s Summary of contents

Page 1

... TFT LCD displays up to XGA resolution Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2010-2011. All rights reserved. Document Number: MPC5645S MPC5645S 416 TEPBGA 176 LQFP • ...

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... Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . 128 5.1 176 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 5.2 208 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 5.3 416 TEPBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 MPC5645S Microcontroller Data Sheet, Rev. 6 junction temperature DCULite 106 Interrupt (NMI) Timing . . . . . . . . . . . . . . . . . . 117 2 C timing 124 Freescale Semiconductor ...

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... LQFP, 0.5 mm pitch  outline — 416 TEPBGA, 1mm ball pitch  outline 1. See the device comparison table for package offerings for each device in the family. Freescale Semiconductor 2 C) internal bus controllers with master/slave bus interface MPC5645S Microcontroller Data Sheet, Rev ...

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... TFT displays directly. The MPC5645S features a 2D OpenVG graphics accelerator, Video Input Unit (VIU2) and two on-chip display control units (DCU3 and DCULite) designed to drive two color TFT displays simultaneously. The MPC5645S includes a enhanced QuadSPI Serial Flash Controller and an optional DRAM controller allowing graphics RAM expansion externally ...

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... Table 1. MPC5645S device comparison (continued) Feature Package QuadSPI serial flash interface Stepper Motor Controller (SMC) Stepper Stall Detect (SSD) Sound Generator Module (SGM) 32 kHz external crystal oscillator Real Time Counter and Autonomous Periodic Interrupt (RTC/API) Periodic interrupt timer (PIT) Software Watchdog Timer (SWT) ...

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... RTC SGM SMC SSD STM SWT TCON VIU2 VReg Figure 1. MPC5645S block diagram MPC5645S Microcontroller Data Sheet, Rev. 6 DCULite TCON / RSDS DCU3 QuadSPI DRAM interface RLE decoder SSD – Periodic Interrupt Timer – Run Length Encoding – Reduced-Swing Differential Signal interface – ...

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... Feature details 1.3.1 Low-power operation The MPC5645S is designed for optimized low-power operation and dynamic power management of the CPU and peripherals. Power management features include software-controlled clock gating of peripherals and multiple power domains to minimize leakage in low-power modes. There are three low-power modes: • ...

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... — — Off Off Off Off MPC5645S Microcontroller Data Sheet, Rev Wake-up time FP — — — — — — — — — — 350 µs 4 µs 20 µ 200 µ ...

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... ID of the last master to be granted access. The crossbar provides the following features: • Seven master ports: — e200z4d core instruction port — e200z4d core complex load/store data port Freescale Semiconductor MPC5645S Microcontroller Data Sheet, Rev. 6 Overview 9 ...

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... When multiple tasks share a resource, coherent accesses to that resource need to be supported. The INTC supports the priority ceiling protocol for coherent accesses. By providing a modifiable priority mask, the priority can be raised temporarily so that all tasks which share the resource can not preempt each other. 10 MPC5645S Microcontroller Data Sheet, Rev ADC, eMIOS, and General Freescale Semiconductor ...

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... Configurable digital input filter that can be applied general purpose input pins for noise elimination on external interrupts • Register configuration protected against change with soft lock for temporary guard or hard lock to prevent modification until next reset Freescale Semiconductor MPC5645S Microcontroller Data Sheet, Rev. 6 Overview 11 ...

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... Separate internal power domains applied and 8 KB SRAM blocks during STANDBY modes to retain contents during low power mode 1.3.10 On-chip graphics SRAM The MPC5645S microcontroller has 1 MB on-chip graphics SRAM with the following features: • Two crossbar slave ports: — One dedicated to the 2D Graphics Accelerator (GFX2D) access — ...

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... YUV 4:2:2 color space. The ability of the DCU3 to handle input data in resolutions as low as 1bpp, 2bpp, and 4bpp enables a highly efficient use of internal memory resources of the MPC5645S. A special tiled mode can be enabled on any of the 16 layers to repeat a pattern optimizing graphic memory usage. ...

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... Display Control Unit Lite (DCULite) The DCULite is a display controller designed to enable the MPC5645S to drive a second TFT LCD display up to XGA resolution using direct blit graphics and video. The DCULite includes all features of the DCU3, including the PDI with the following exceptions: • ...

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... Supports 16-wide and 32-wide DDR1, DDR2, and LPDDR1 DRAM devices • Controller supports one chip select, 8-bank DRAM system • Supports dynamic on-die termination in the host device and in the DRAM • Supports memory sizes as small as 64 Mbit Freescale Semiconductor MPC5645S Microcontroller Data Sheet, Rev. 6 Overview 15 ...

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... Edge aligned output pulse width modulation — Programmable pulse period and duty cycle — Supports 0% and 100% duty cycle — Shared or independent time bases • Programmable phase shift between channels • 4 channels of Quadrature Decode • DMA transfer support 16 MPC5645S Microcontroller Data Sheet, Rev. 6 Freescale Semiconductor ...

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... The DSPI features: • Full duplex, synchronous transfers • Master or slave operation • Programmable master bit rates • Programmable clock polarity and phase • End-of-transmission interrupt flag • Programmable transfer baud rate Freescale Semiconductor MPC5645S Microcontroller Data Sheet, Rev. 6 Overview 17 ...

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... Serial communication interface module (LINFlex) The MPC5645S devices include up to four LINFlex modules and support for LIN Master mode, LIN Slave mode, and UART mode. The modules are LIN state machine compliant to the LIN 1.3, 2.0, and 2.1 Specifications and handle LIN frame transmission and reception without CPU intervention. ...

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... Repeated START signal generation • Acknowledge bit generation/detection • Bus-busy detection 1.3.26 System clocks and clock generation modules The system clock on the MPC5645S can be derived from an external oscillator, an on-chip FMPLL, or the internal 16 MHz oscillator. Freescale Semiconductor 2 C) controller modules MPC5645S Microcontroller Data Sheet, Rev. 6 Overview ...

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... The source system clock frequency can be changed via an on-chip programmable clock divider (1 to 2). An additional programmable peripheral bus clock divider (ratios 1 to ) is also available. The MPC5645S has two on-chip FMPLLs (primary and secondary). Each features the following: • ...

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... The SSD module features the following: • Programmable full step state • Programmable integration polarity • Blanking (recirculation) state • 16-bit integration accumulator register Freescale Semiconductor MPC5645S Microcontroller Data Sheet, Rev. 6 Overview 21 ...

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... Run-time access to embedded processor memory map via the JTAG port. This allows for enhanced download/upload capabilities. • Watchpoint Messaging via the auxiliary pins provides visibility when debugging. • Watchpoint Trigger enablement of Program and/or Data Trace Messaging enhances debug capability. 22 MPC5645S Microcontroller Data Sheet, Rev. 6 Freescale Semiconductor ...

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... Auxiliary interface for higher data input/output. • Registers for Program Trace, Data Trace, Ownership Trace, and Watchpoint Trigger. • All features are controllable and configurable via the JTAG port. • Nexus Auxiliary port is supported on the 416BGA package. Freescale Semiconductor MPC5645S Microcontroller Data Sheet, Rev. 6 Overview 23 ...

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... TDO / PH2 43 TMS / PH3 44 Note: Functions in bold are available only on this package. 24 MPC5645S 176 LQFP Top view Figure 2. 176-pin LQFP pinout MPC5645S Microcontroller Data Sheet, Rev. 6 132 VDDE_B 131 PA13 / DCU_G5 130 PA12 / DCU_G4 PA11 / DCU_G3 129 PA10 / DCU_G2 128 127 ...

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... TEPBGA package pinout Figure 4 shows the pinout for the 416 TEPBGA package. Freescale Semiconductor MPC5645S 208 LQFP Top view Figure 3. 208-pin LQFP pinout MPC5645S Microcontroller Data Sheet, Rev. 6 Pinout and signal descriptions 156 VDDE_B 155 PA13 / DCU_G5 / RSDS6M 154 PA12 / DCU_G4 / RSDS6P ...

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A 30] 31] ddr_ba[0]ddr_ba[1]ddr_ba[ ddr_dq[2 ddr_dqs[ ddr_dm[3 B VSS VSS ddr_cas ddr_ras VSS ddr_dq[2 VDDE_DD ddr_dq[2 VDDE_DD ddr_dram VDDE_DD C VSS ...

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... The following pads are pull-up: — PB[6] — PH[0] — PH[1] — PH[3] 2.4.2 Voltage supply pins Voltage supply pins are used to provide power to the device. Two dedicated pins are used for 1.2 V regulator stabilization. Freescale Semiconductor MPC5645S Microcontroller Data Sheet, Rev. 6 Pinout and signal descriptions 27 ...

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... MPC5645S Microcontroller Data Sheet, Rev. 6 Pin number 208 LQFP 416 TEPBGA 23, 58, 79, 136, 162, K10,K12,K14,K16,L 186, 207 11,L13,L15,L17,M1 0,M16,N11,N17,P1 0,P16,R11,R17,T10 ,T12,T14,T16,U11, U13,U15,U17 7, 18, 38, 47, 57, 64, ...

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... I/O M Input, weak pull — — — — MPC5645S Microcontroller Data Sheet, Rev. 6 Pinout and signal descriptions Pin number 208 LQFP 416 TEPBGA 25 AB4 22 AC1 — C2,C5,C8,C11,C14, E3,H3,L3,N3,T3 — D6, D12, F4, R4 pin. SS Pin number 1 176 LQFP ...

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... M PCR[82] 171 M PCR[83] 172 M PCR[84] 173 M PCR[197] M PCR[198] F PCR[200] M PCR[199] M PCR[201] M PCR[185] MPC5645S Microcontroller Data Sheet, Rev. 6 Pin number 1 176 LQFP 208 LQFP 416 TEPBGA — 145, 165 Pin number 208 LQFP 416 TEPBGA 201 189 206 190 ...

Page 31

... Table 6. DRAM interface pin summary I/O Pad direction type I/O DDR I/O DDR I/O DDR I/O DDR I/O DDR I/O DDR I/O DDR I/O DDR I/O DDR I/O DDR I/O DDR I/O DDR I/O DDR MPC5645S Microcontroller Data Sheet, Rev. 6 Pinout and signal descriptions 1 Pin number 208 LQFP 416 TEPBGA n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a Pin number RESET PCR 2 config ...

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... DDR I/O DDR I/O DDR I/O DDR I/O DDR Output DDR Output DDR Output DDR Output DDR MPC5645S Microcontroller Data Sheet, Rev. 6 Pin number RESET PCR 2 config 416 TEPBGA PCR[250] None, None E4 PCR[251] None, None E1 PCR[252] None, None F1 PCR[253] None, None G1 PCR[254] None, None G4 PCR[255] None, None ...

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... Output DDR Output DDR Output DDR Output DDR Output DDR Output DDR Output DDR Output DDR MPC5645S Microcontroller Data Sheet, Rev. 6 Pinout and signal descriptions Pin number RESET PCR 2 config 416 TEPBGA PCR[217] Output, B15 None PCR[216] Output, D15 None PCR[215] ...

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... DDR Output DDR Output DDR Output DDR Output DDR Output DDR Input — Input — Figure 5 explains the pin sharing arrangement. MPC5645S Microcontroller Data Sheet, Rev. 6 Pin number RESET PCR 2 config 416 TEPBGA PCR[221] Output, B6 None PCR[227] Output, B7 None PCR[228] Output, ...

Page 35

... Therefore, only select the DCU3 function on this pin when ready to configure clock for a TFT panel. Freescale Semiconductor VIU[9:0] VIU2 RGB565 RGB888 8-bit mono YUV422 MPC5645S Microcontroller Data Sheet, Rev. 6 Pinout and signal descriptions Direct feed of PDI interface to DCU3 or DCULite DCU3 DCULite PDI PDI XBAR ...

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Functional ports The functional port pins are listed in Table 7. Port Alternate PCR Function 1 pin function PORT A PA[0] PCR[0] Option 0 GPIO[0] Option 1 DCU_R0 Option 2 SDA_1 Option 3 eMIOS0[18] PA[1] PCR[1] Option 0 GPIO[1] ...

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Port Alternate PCR Function 1 pin function PA[7] PCR[7] Option 0 GPIO[7] Option 1 DCU_R7 Option 2 — Option 3 — PA[8] PCR[8] Option 0 GPIO[8] Option 1 DCU_G0 Option 2 SCL_2 Option 3 eMIOS0[20] PA[9] PCR[9] Option 0 GPIO[9] ...

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Port Alternate PCR Function 1 pin function PA[15] PCR[15] Option 0 GPIO[15] Option 1 DCU_G7 Option 2 — Option 3 — PORT B PB[0] PCR[16] Option 0 GPIO[16] Option 1 CANTX_0 Option 2 TXD_0 Option 3 — PB[1] PCR[17] Option ...

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Port Alternate PCR Function 1 pin function PB[7] PCR[23] Option 0 GPIO[23] Option 1 SIN_0 Option 2 eMIOS1[20] Option 3 I2S_SCK/PWMOA PB[8] PCR[24] Option 0 GPIO[24] Option 1 SOUT_0 Option 2 eMIOS1[19] Option 3 I2S_DO/PWMO PB[9] PCR[25] Option 0 GPIO[25] ...

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Port Alternate PCR Function 1 pin function PC[0] PCR[30] Option 0 GPIO[30] Option 1 — Option 2 — Option 3 — PC[1] PCR[31] Option 0 GPIO[31] Option 1 — Option 2 — Option 3 — PC[2] PCR[32] Option 0 GPIO[32] ...

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Port Alternate PCR Function 1 pin function PC[8] PCR[38] Option 0 GPIO[38] Option 1 — Option 2 — Option 3 — PC[9] PCR[39] Option 0 GPIO[39] Option 1 — Option 2 — Option 3 — PC[10] PCR[40] Option 0 GPIO[40] ...

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Port Alternate PCR Function 1 pin function PD[0] PCR[46] Option 0 GPIO[46] Option 1 M0C0M Option 2 SSD0_0 Option 3 eMIOS1[8] PD[1] PCR[47] Option 0 GPIO[47] Option 1 M0C0P Option 2 SSD0_1 Option 3 eMIOS1[16] PD[2] PCR[48] Option 0 GPIO[48] ...

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Port Alternate PCR Function 1 pin function PD[8] PCR[54] Option 0 GPIO[54] Option 1 M2C0M Option 2 SSD2_0 Option 3 — PD[9] PCR[55] Option 0 GPIO[55] Option 1 M2C0P Option 2 SSD2_1 Option 3 eMIOS0[9] PD[10] PCR[56] Option 0 GPIO[56] ...

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Port Alternate PCR Function 1 pin function PE[0] PCR[62] Option 0 GPIO[62] Option 1 M4C0M Option 2 SSD4_0 Option 3 — PE[1] PCR[63] Option 0 GPIO[63] Option 1 M4C0P Option 2 SSD4_1 Option 3 — PE[2] PCR[64] Option 0 GPIO[64] ...

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Port Alternate PCR Function 1 pin function PF[0] PCR[70] Option 0 GPIO[70] Option 1 eMIOS1[19] Option 2 EVTO Option 3 DCULITE_B2 PF[1] PCR[71] Option 0 GPIO[71] Option 1 eMIOS1[20] Option 2 MSEO Option 3 DCULITE_B3 PF[2] PCR[72] Option 0 GPIO[72] ...

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Port Alternate PCR Function 1 pin function PF[8] PCR[78] Option 0 GPIO[78] Option 1 SDA_0 Option 2 CS2_1 Option 3 RXD_1 PF[9] PCR[79] Option 0 GPIO[79] Option 1 SCL_0 Option 2 CS1_1 Option 3 TXD_1 PF[10] PCR[80] Option 0 GPIO[80] ...

Page 47

Port Alternate PCR Function 1 pin function PG[0] PCR[86] Option 0 GPIO[86] Option 1 DCU_B0 Option 2 SCL_3 Option 3 eMIOS0[21] PG[1] PCR[87] Option 0 GPIO[87] Option 1 DCU_B1 Option 2 SDA_3 Option 3 eMIOS0[22] PG[2] PCR[88] Option 0 GPIO[88] ...

Page 48

Port Alternate PCR Function 1 pin function PG[8] PCR[94] Option 0 GPIO[94] Option 1 DCU_VSYNC Option 2 — Option 3 — PG[9] PCR[95] Option 0 GPIO[95] Option 1 DCU_HSYNC Option 2 — Option 3 — PG[10] PCR[96] Option 0 GPIO[96] ...

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Port Alternate PCR Function 1 pin function 6 PH[2] PCR[101] Option 0 GPIO[101] Option 1 TDO Option 2 — Option 3 — 6 PH[3] PCR[102] Option 0 GPIO[102] Option 1 TMS Option 2 — Option 3 — PH[4] PCR[103] Option ...

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Port Alternate PCR Function 1 pin function PJ[1] PCR[106] Option 0 GPIO[106] Option 1 VIU1_PDI_HSYNC Option 2 eMIOS1[9] Option 3 eMIOS0[8] PJ[2] PCR[107] Option 0 GPIO[107] Option 1 VIU0_PDI_VSYNC Option 2 eMIOS1[14] Option 3 eMIOS0[9] PJ[3] PCR[108] Option 0 GPIO[108] ...

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Port Alternate PCR Function 1 pin function PJ[9] PCR[114] Option 0 GPIO[114] Option 1 VIU7_PDI5 Option 2 eMIOS1[22] Option 3 eMIOS0[12] PJ[10] PCR[115] Option 0 GPIO[115] Option 1 VIU8_PDI6 Option 2 eMIOS1[17] Option 3 eMIOS0[11] PJ[11] PCR[116] Option 0 GPIO[116] ...

Page 52

Port Alternate PCR Function 1 pin function PK[1] PCR[122] Option 0 GPIO[122] Option 1 QUADSPI_IO2_B Option 2 eMIOS1[14] Option 3 VIU7_PDI15 PK[2] PCR[123] Option 0 GPIO[123] Option 1 VIU0_PDI8 Option 2 eMIOS1[10] Option 3 DCULITE_TAG PK[3] PCR[124] Option 0 GPIO[124] ...

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Port Alternate PCR Function 1 pin function PK[9] PCR[130] Option 0 GPIO[130] Option 1 I2S_DO / PWMO Option 2 DCULITE_R4 Option 3 TCON[10] PK[10] PCR[131] Option 0 GPIO[131] Option 1 SDA_1 Option 2 eMIOS1[12] Option 3 DCULITE_TAG PK[11] PCR[132] Option ...

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Port Alternate PCR Function 1 pin function PL[4] PCR[137] Option 0 GPIO[137] Option 1 CS2_2 Option 2 VIU5_PDI13 Option 3 TCON[6] PL[5] PCR[138] Option 0 GPIO[138] Option 1 CS1_2 Option 2 VIU6_PDI14 Option 3 TCON[7] PL[6] PCR[139] Option 0 GPIO[139] ...

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Port Alternate PCR Function 1 pin function PL[12] PCR[145] Option 0 GPIO[145] Option 1 eMIOS1[12] Option 2 DCULITE_G4 Option 3 — PL[13] PCR[146] Option 0 GPIO[146] Option 1 eMIOS1[13] Option 2 DCULITE_G5 Option 3 — PL[14] — — Reserved PL[15] ...

Page 56

Port Alternate PCR Function 1 pin function PM[5] PCR[152] Option 0 GPIO[152] Option 1 VIU5_PDI13 Option 2 eMIOS1[22] Option 3 DCU_TAG PM[6] PCR[153] Option 0 GPIO[153] Option 1 VIU6_PDI14 Option 2 eMIOS1[23] Option 3 DCULITE_TAG PM[7] PCR[154] Option 0 GPIO[154] ...

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Port Alternate PCR Function 1 pin function PM[13] PCR[160] Option 0 GPIO[160] Option 1 DCULITE_PCLK Option 2 — Option 3 SGM_MCLK PM[14] — — Reserved PM[15] — — Reserved PORT N PN[0] PCR[161] Option 0 GPIO[161] Option 1 DCULITE_HSYNC Option ...

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Port Alternate PCR Function 1 pin function PN[6] PCR[167] Option 0 GPIO[167] Option 1 DCULITE_R4 Option 2 — Option 3 TCON[8] PN[7] PCR[168] Option 0 GPIO[168] Option 1 DCULITE_R5 Option 2 — Option 3 TCON[9] PN[8] PCR[169] Option 0 GPIO[169] ...

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Port Alternate PCR Function 1 pin function PN[14] PCR[175] Option 0 GPIO[175] Option 1 DCULITE_G4 Option 2 — Option 3 eMIOS0[19] PN[15] PCR[176] Option 0 GPIO[176] Option 1 DCULITE_G5 Option 2 — Option 3 eMIOS0[20] PORT P PP[0] PCR[177] Option ...

Page 60

... Using the PSMI registers in the System Integration Unit Lite (SIUL), different pads can be multiplexed to the same peripheral input. Please see the SIUL chapter of the MPC5645S Microcontroller Reference Manual for details. 4 See the “Pad types” section for an explanation of the letters in this column. ...

Page 61

... For DDR, the 3.3 V supply (VDD33_DR) should come before VDD_DR. This sequence ensures that when VREG releases its LVDs, the IO and other HV segments are powered properly. This is important because MPC5645S doesn't monitor LVDs supplies. Freescale Semiconductor Table 6. Pad Types ...

Page 62

... The classification is shown in the column labeled “C” in the parameter tables where appropriate. 62 Table 8 are used and the parameters are tagged accordingly in the tables where Table 8. Parameter Classifications Tag description NOTE MPC5645S Microcontroller Data Sheet, Rev This could be done Freescale Semiconductor ...

Page 63

... Relative SSR Relative SSE_A ) SS ) SSM with respect with respect refers collectively to I/O voltage supplies, i.e refers collectively to I/O voltage supply grounds, i.e MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Value Unit SpecID Min Max –0.3 +5.5 V D1.1 V –0 – ...

Page 64

... Relative SSPLL ) SSR Relative DDE_A DDE_B ) SS ) SSE_A ) SSE_B ) SSM with respect with respect with respect MPC5645S Microcontroller Data Sheet, Rev. 6 > must not exceed the SS Value Unit Min Max +3.0 +3 -0 -0.1 V +0.1 V ...

Page 65

... DDR SS12 , DDE_A DDE_B DD_DR /V pair. VDDmin value for for VDDE_A & VDDM as well DD SS device is reset and V SSE_A SS . MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics , and V . DDM unless otherwise noted. SSM 65 ...

Page 66

... SSE_A ) SSE_B ) SSMA with respect with respect with respect pair. DDA SSA and recommended that this cap should be placed, as close DDR SS12 MPC5645S Microcontroller Data Sheet, Rev. 6 Value Unit Min Max +4.5 +5 +3.0 +5.5 V –0 –0 ...

Page 67

... Parameter 2 Single layer board –1s 2 Four layer board –2s2p 2 @200 ft./min., single layer board –1s 2 @200 ft./min., Four layer board –2s2p 3 4 MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics , and V . VDDmin value for DDMA DDMB DDMC , and V SSE_A SSE_E ...

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... Four layer board –2s2p can be obtained from the equation  C/W) MPC5645S Microcontroller Data Sheet, Rev (continued) Conditions Value Unit — 2 °C/W 1 Conditions Value Unit 26 °C/W 18 °C/W 20 °C/W 15 °C/W — ...

Page 69

... For most packages, a better model is required. Freescale Semiconductor  C/W) per JESD51- JA JC CA o C/W) o C/W) o C/W) . For example, change the air flow around the device, add a heat sink, change the CA MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Eqn. 2 Eqn ...

Page 70

... East Middlefield Rd. Mountain View, CA 94043 (415) 964-5111 MIL-SPEC and EIA/JESD (JEDEC) specifications are available from Global Engineering Documents at 800-854-7179 or 303-397-7956. JEDEC specifications are available on the WEB at http://www.jedec.org ( C/W) MPC5645S Microcontroller Data Sheet, Rev. 6 Eqn. 4 Freescale Semiconductor ...

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... Capacitances should be placed on the board as near as possible to the associated pins. Care should also be taken to limit the serial inductance of the board to less than 15 nH. For the MPC5645S microcontroller, 100 nF should be placed between each V pair. Additionally, 10 F should be placed between the V ...

Page 72

... L 4 capacitances of 10 µF each ESR of external cap 1 bond wire pad R Cload = 10 µ 200 kHz @ no load @ DC @ 400 mA @ 200 kHz @ 400 mA Cload = 10 µ Cload = 10 µ MPC5645S Microcontroller Data Sheet, Rev Conditions Min Max Unit SpecID 3.0 5.5 V -40 150 °C — ...

Page 73

... CPU 5 with external DRAM, 416 TEPBGA package option only f = 125MHz, Single Display Drive, CPU no external DRAM, 176 LQFP / 208 LQFP package options 6 Slow internal RC oscillator (128KHz) running MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics 2 Value 1 Conditions Unit Min Typ Max = 25°C, 1.5 — ...

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... A 74 Conditions 7 Slow internal RC oscillator (128KHz) running SXOSC (32KHz) ON and RTC running SXOSC (32KHz) and RTC OFF SXOSC (32KHz) ON and RTC running SXOSC (32 KHz) and RTC OFF MPC5645S Microcontroller Data Sheet, Rev Value 1 Min Typ Max -40 C — 645 — ...

Page 75

... DDE_A NOTE Table 19. DC electrical specifications Condition — — With hysteresis enabled With hysteresis disabled With hysteresis enabled With hysteresis disabled With hysteresis enabled With hysteresis enabled MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics , DDE_B DDA DDR DDM ...

Page 76

... Minimum Ioh (mA) 00 16.1 01 31.8 10 47.2 11 All 61.9 All 61.9 Table 21. Supply leakage VDDE VDD (Typ/Max) 90  A — — — — MPC5645S Microcontroller Data Sheet, Rev. 6 Value Unit Min Max A 25 150 A –2.5 2.5 A –150 150 0.8 Vdde — V — 0.2Vdde V — 0.2Vdd33 ...

Page 77

... With hysteresis enabled With hysteresis enabled With hysteresis disabled With hysteresis disabled — — Weak pull inactive Weak pull inactive — — — — — — — — MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Value Unit SpecID Min Max 1.08 1.32 V 4.5 5.5 V 3.0 3.6 V 0.65 ...

Page 78

... Weak pull inactive Weak pull inactive — — — — — — — Table 24. Supply leakage VDD Typ Max Typ 83.7 nA 0.81 nA 83.7 nA 0.858 nA 48.4 nA 88.2 pA — — — MPC5645S Microcontroller Data Sheet, Rev. 6 Value Unit Min Max 1.08 1.32 V 3.0 3.6 V 3.0 3.6 V 0.65Vdde Vdde+0.3 V Vss–0.3 0.35Vdde V 0.55Vdde Vdde+0.3 V Vss– ...

Page 79

... Table 25. AVG IDDE specifications 1 Load (pF) VDDE (V) 50 5.5 50 5.5 50 5.5 200 5.5 MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics VDDE VDD33 Max Typ — 0 — — — — — — — — — — — — ...

Page 80

... Value Parameter Min 1.08 1.08 3.0 3.0 1.3 Vref–0.05 Vref+0.20 — Vtt+0.8 — Drive mode Minimum Ioh (mA) 111 –16 111 –16 111 –16 111 –16 111 –16 111 –16 MPC5645S Microcontroller Data Sheet, Rev. 6 Drive/slew select IDDE (mA 2.5 00 0.5 00 1.5 Unit SpecID Max 1.32 V D9.71 1.47 3.6 V D9.72 3.6 V D9.73 1.7 V D9.74 Vref+0. ...

Page 81

... Drive mode pad_st_acc P 011 pad_st_dq P 011 pad_st_ck P 011 Freescale Semiconductor Parameter Min 1.08 1.08 2.3 3.0 0.49Vdde Vref–0.04 Vref+0.15 — Vtt+0.81 — Minimum Ioh (mA) –16.2 –16.2 –16.2 MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Value Unit SpecID Max 1.32 V D9.80 1.47 2.7 V D9.81 3.6 V D9.82 0.51Vdde V D9.83 Vref+0.04 V D9.84 — V D9.85 Vref–0.15 V D9.86 — ...

Page 82

... Minimum Ioh (mA) 000 –3.57 001 –7.84 010 –5.36 110 –13.4 000 –3.57 001 –7.84 010 –5.36 110 –13.4 000 –3.57 001 –7.84 010 –5.36 110 –13.4 MPC5645S Microcontroller Data Sheet, Rev. 6 Value Unit SpecID Max 1.32 V D9.89 1.47 1.9 V D9.90 3.6 V D9.91 0.51Vdde V D9.92 Vref+0.04 V D9.93 — V D9.94 Vref–0.125 V D9 ...

Page 83

... Rainbow supports only 150 120 ohm termination and that can be enabled by enabling any bit of the termination control register (all of them are OR’ed). Vtrip max (V) 0.79 0.56 0.65 0.33 1.40 MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Value Unit SpecID Typ Max  150 180 D9.98 Vtrip min Hysteresis min (V) 0.44 ...

Page 84

... W 84 Figure 8. Start-up reset requirements unknown reset filtered by state lowpass filter W FRST FRST W NFRST Figure 9. Noise filtering on reset signal MPC5645S Microcontroller Data Sheet, Rev. 6 hw_rst ‘ ‘ device under hardware reset Freescale Semiconductor ...

Page 85

... 50pF 3.3V ± 10%, ipp_hve = 100pF 3.3V ± 10%, ipp_hve = DD 1 — — -40 / +105 C, unless otherwise specified MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics 2 Value Unit SpecID Min Typ Max 0.65V — -0.4 — 0.35V V DD 0.1V — ...

Page 86

... MHz OSC 2 Maximum value is for extreme cases using high Q, low frequency crystals 86 < 5pF). PKG Conditions Loop controlled Pierce Loop controlled Pierce EXTAL and XTAL pins MPC5645S Microcontroller Data Sheet, Rev. 6 Value Unit SpecID Min Typ Max 4.0 16 MHz 100 µ ...

Page 87

... Figure 10. Crystal oscillator and resonator connection scheme PC[14]/PC[15] must not be directly used to drive external circuits DDMIN V XTAL V XOSCLP Figure 11. Slow external crystal oscillator electrical characteristics Freescale Semiconductor DEVICE NOTE 90% 10% T valid internal clock XOSCLPSU MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics PC[15] PC[14] 1/f XOSCLP 87 ...

Page 88

... A Table 37. FMPLL electrical characteristics 1 Conditions 3 3 Stable oscillator (f PLLIN f (PHI i.e. FMPLL O/P) = PLLOUT 15.625 MHz @ 10 MHz resonator MHz (resonator) PLLIN T = 25°C A PLLIN MPC5645S Microcontroller Data Sheet, Rev Value Unit SpecID Typ Max 32 — 40 kHz 1.33 1.74 V 1.37 1.74 — — 5 µA — ...

Page 89

... Conditions °C, trimmed °C, trimmed °C A High frequency config °C in uration -40 to +105 °C, unless otherwise specified. A MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics 2 Value 1 Unit SpecID Min Typ Max 16 MHz O12.1 200 µA 10 µ ...

Page 90

... Table 40. Program and erase specifications Min Value 4 Table 41. Flash module life Conditions — — Blocks with 0 - 1,000 P/E cycles Blocks with 1,001 - 10,000 P/E cycles Blocks with 10,001 - 100,000 P/E cycles MPC5645S Microcontroller Data Sheet, Rev. 6 Typical Initial 3 Max Unit 1 2 Value Max s — 22 500 — ...

Page 91

... Differential non-linearity error (DNL) (4) Integral non-linearity error (INL) (4) (5) Center of a step of the actual transfer curve (3) 1 LSB (ideal 1017 1018 1019 1020 1021 1022 1023 V (LSB ) in(A) ideal MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Gain Error GE 1 LSB ideal = V / 1024 DDA 91 ...

Page 92

...  -------------------------------------------------------------------------- - Filter Current Limiter and MPC5645S Microcontroller Data Sheet, Rev. 6 being the external circuit  LSB 2 INTERNAL CIRCUIT SCHEME V DD Channel Sampling Selection R R SW1 ...

Page 93

... P2 P3 (refer to the equivalent circuit reported in A Voltage Transient V <0.5 LSB 2  1  (call MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Channel Extended Sampling Selection Switch SW2 SW1 and R ) ...

Page 94

...   with respect to the ideal source The filter is typically designed to act as anti-aliasing. S MPC5645S Microcontroller Data Sheet, Rev the capacitance A1  (since the time constant in reality P1    and C ...

Page 95

... maximum, that is for instance 5V), assuming to accept a maximum error of A value: F   2048 C S MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics (Conversion Rate vs. Filter Pole) = conversion Rate longer than the sampling time definitively much higher than the ...

Page 96

... ADC ADC_conf_sample_input = MHz, ADC ADC_conf_sample_input = 127 MHz, ADC ADC_conf_comp = 2 Current injection on one ADC input, different from the converted one No overload After offset cancellation MPC5645S Microcontroller Data Sheet, Rev Value Unit SpecID Min Typ Max -0.1 0.1 V –0.1 V +0.1 V DDE_A DDE_A V -0 ...

Page 97

... MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics 2 Value Unit SpecID Min Typ Max -3 3 LSB -2 2 LSB LSB -3 3 LSB LSB ...

Page 98

... Prop. delay (ns) Rise/fall edge (ns) 1 L>H / H>L Min Max Min 2 152 / 165 205 / 220 MPC5645S Microcontroller Data Sheet, Rev. 6 Drive/slew Drive load rate select (pF) Max MSB, LSB 1 1 1 1 1.02 / 1.4 ...

Page 99

... N 15.4 / 15.4 144 / 155 415 / 415 533 / 540 106 / 0.4 / 0.4 MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Drive/slew Drive load rate select (pF) Max MSB, LSB 200 ...

Page 100

... C Table 47. AC specifications at 3.3 V VDDE Rise/fall edge (ns) Max Min Max 2.4/2.4 3.1/2.5 5.6/5.4 2.7/2.7 0.9/1.1 1.7/2.0 2.4/2.4 3.1/2.5 5.6/5.4 2.7/2.7 0.9/1.1 1.7/2.0 2.4/2.4 3.1/2.5 5.7/5.7 2.6/2.6 1.1/1.3 2.3/2.3 MPC5645S Microcontroller Data Sheet, Rev Current slew Load drive (mA/ns) (pF) Typ Max Min Typ Max — 4 0.01 — 2 — 2 0.01 — 2 — 2 0.01 — 2 100 — 2 0.01 — 2 200 — ...

Page 101

... MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Drive/slew Drive load rate select Libraries (pF) MSB, LSB 5 011 6MDDR 20 5 011 6MDDR 20 5 011 6MDDR 20 Drive/slew Drive load rate select Libraries (pF) MSB, LSB 5 000 6MDDR 20 5 001 20 5 010 20 5 110 20 5 000 ...

Page 102

... Parameter values guaranteed by design. 102 Rise/fall edge (ns) Max Min Max 2.4/2.4 0.4/0.6 2.7/2.7 2.7/2.7 0.7/0.9 1.8/3.4 2.4/2.4 1.1/1.1 3.0/2.8 2.7/2.7 0.3/0.4 1.0/1.1 2.4/2.4 0.9/1.1 3.0/2.8 2.7/2.7 0.3/0.4 0.9/1.0 2.5/2.5 1.5/1.2 3.2/2.6 2.7/2.7 0.4/0.4 1.1/1.2 Table 50. JTAG interface timing Characteristic DD MPC5645S Microcontroller Data Sheet, Rev. 6 Drive/slew Drive load rate select (pF) MSB, LSB 5 000 20 5 001 20 5 010 20 5 110 20 1 Min Max Unit 100 — — — ...

Page 103

... TCK 3 TCK TMS, TDI TDO Freescale Semiconductor 1 Figure 17. JTAG test clock input timing Figure 18. JTAG test access port timing MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics 103 ...

Page 104

... Electrical characteristics TCK 9 Output Signals 10 Output Signals Input Signals 104 12 Figure 19. JTAG boundary scan timing MPC5645S Microcontroller Data Sheet, Rev Freescale Semiconductor ...

Page 105

... MCKO MDO MSEO EVTO Freescale Semiconductor Table 51. Nexus debug port timing Characteristic Output Data Valid Figure 20. Nexus Output Timing MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics 1 Min Max Unit 15 — 0.1 0.2 t MCYC 0.1 0.2 t MCYC 0 ...

Page 106

... LCD interface timing for a generic active matrix color TFT panel. In this figure signals are shown with positive polarity. The sequence of events for active matrix interface timing is: 106 8 Figure 21. Nexus TCK Timing 10 11 Figure 22. Nexus TDI, TMS, TDO Timing MPC5645S Microcontroller Data Sheet, Rev Freescale Semiconductor ...

Page 107

... VSYN_PARA register Figure 23, the “LD[23:0]” signal is “line data,” an aggregation of the DCU’s RGB signals—R[0:7], G[0:7] and B[0:7]. Freescale Semiconductor LINE 2 LINE 3 LINE MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics LINE n-1 LINE n m 107 ...

Page 108

... Invalid Data LD[23:0] HSYNC DE 108 Characteristic DELTA_X * t (PW_H + BP_H + FP_H + DELTA_X ) * DELTA_Y * t (PW_V + BP_V + FP_V + DELTA_Y ) * t HSP t t BPH Figure 24. Horizontal sync timing MPC5645S Microcontroller Data Sheet, Rev. 6 Value Unit 31.25 ns PW_H PCP BP_H * t ns PCP FP_H * t ns PCP ns PCP ns t ...

Page 109

... Load for display freq from MHz 5 Parameter values guaranteed by design. Freescale Semiconductor t VSP BPV Figure 25. Vertical sync pulse Min. Characteristic Value 31.25 40 MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics t FPV DELTA_Y Invalid Data 1,2,3,4 —access level Typical Max. Unit Value Value — ns — — ...

Page 110

... DHD Table 54. RSDS electrical characteristics 1 Conditions = 100 Ohms L V +/-5% CM 20% to 80%, V =200mV 5pF variation After power down, high to low Data out MPC5645S Microcontroller Data Sheet, Rev Value Unit Min Typ Max 3.0 3.3 3 µA 100 µ MHz ...

Page 111

... Freescale Semiconductor Figure 27. TCON/RSDS timing diagram MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics 111 ...

Page 112

... LPDDR Full Speed 010 1.8V DDR2 Half Strength 011 2.5V DDR1 100 Not supported 101 Not supported 110 1.8V DDR2 Full Strength 111 SDR DDE_DR Values Min Typ Values Min Typ MPC5645S Microcontroller Data Sheet, Rev 3.3 V) Unit Max = 1.8 V) DDE_DR Unit Max Freescale Semiconductor ...

Page 113

... P Pad input Leakage in Current Freescale Semiconductor Values Min Typ Values Min Typ Condition Min Nom 2.30 2.50 ] 1.08 1.20 1.13 1.25 Vref-0.04 vref Vref+0.15 -0.3 Vref+0.31 MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics = 2.5 V) DDE_DR Unit Max = 1.8 V) DDE_DR Unit Max Max Units Notes 2.70 V JESD8-9B 1.32 V 1.38 V JESD8-9B Vref+0.04 V JESD8-9B vddet+0.3 ...

Page 114

... Vout=Voh -16.2 Vout=Vol 16.2 PAD Figure 28. SSTL_2 CLass II Test Load Condi- Min Nom tion 1.7 1.8 1.08 1.2 0.833 0.9 Vref-0.04 Vref Vref+0.125 -0.3 Vref+0.25 MPC5645S Microcontroller Data Sheet, Rev. 6 Max Units Notes V 0. vddet = 2.3V Voh = 1.95V mA vddet = 2.3V Vol = 0.35V Vtt 70 ohms Z =70 td= 0.167ns 0 4pF Max Units Notes 1 ...

Page 115

... Vtt (0.5*vddet) with 4.0 pf, representing the DDR2 input capacitance. See (Figure 29. "SSTL_18 CLass II Test Load"). ipp_do pad_st/pad_st_odt Freescale Semiconductor Condi- Min Nom tion vddet-0.28 Vout=Voh -13.4 Vout=Vol 13.4 PAD Figure 29. SSTL_18 CLass II Test Load MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Max Units Notes Vref-0.25 V JESD8-15A +/-10 µ JESD8-15A vddet = 1 ...

Page 116

... Condition Min Nom 1.7 1.8 1.08 1.2 vddet*0.7 -0.3 vddet*0.8 -0.3 Ioh=-0.1mA vddet*0.9 Iol=0.1mA f PIX_CLK t DHD Figure 30. VIU2 timing diagram Table 63. VIU2 timing parameters Min — MPC5645S Microcontroller Data Sheet, Rev. 6 Max Units Notes 1.9 V JESD79-4 1.32 V vddet+0.3 V JESD79-4 vddet*0.3 V JESD79-4 vddet+0.3 V JESD79-4 vddet*0.2 V JESD79-4 V JESD79-4 vddet*0 ...

Page 117

... Parameter values guaranteed by design. Freescale Semiconductor Table 64. IRQ and NMI Timing Characteristic 2 1,2 3 Figure 31. IRQ and NMI Timing Table 65. eMIOS timing Characteristic = 1. 1.32 V, VDDE_x = 3 5 DD12 MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Max. Min. Value Unit Value 200 — ns 200 — ns 400 — ...

Page 118

... D Slave SOUT Disable Time DIS (PCSx inactive to SOUT High-Z or invalid) 118 Table 66. FlexCAN timing Characteristic = 1. 1.32 V, VDDE_x = 3 5 DD12 1 Table 67. DSPI Timing Characteristic 3 MPC5645S Microcontroller Data Sheet, Rev Max. Min. value Unit value — 22.48 ns — 12. -40 to 105 °C, and ...

Page 119

... This delay value is corresponding to SMPL_PT=00b which is bit field 9 and 8 of DSPI_MCR register. Freescale Semiconductor 1 Table 67. DSPI Timing (continued) Characteristic -40 to 105 °C, and with SRC = 0b10. A MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Min Max Unit 20 — — ...

Page 120

... SIN SOUT Figure 33. DSPI classic SPI timing—master, CPHA = 1 120 Last Data First Data Data 10 First Data Data Last Data 7 Data First Data 10 Data First Data MPC5645S Microcontroller Data Sheet, Rev Last Data 9 Last Data Freescale Semiconductor ...

Page 121

... Figure 35. DSPI classic SPI timing—slave, CPHA = 1 Freescale Semiconductor First Data Data Last Data 7 8 Data Last Data First Data 9 5 Data First Data 7 8 Data First Data MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Last Data Last Data 121 ...

Page 122

... Figure 37. DSPI modified transfer format timing—master, CPHA = 1 122 First Data Last Data Data 10 9 First Data Last Data Data 7 First Data Data 10 First Data Data MPC5645S Microcontroller Data Sheet, Rev Last Data 9 Last Data Freescale Semiconductor ...

Page 123

... Figure 39. DSPI modified transfer format timing—slave, CPHA = 1 Freescale Semiconductor First Data Data Last Data 8 7 Data First Data Last Data 9 5 First Data Data 7 8 First Data Data MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Last Data Last Data 123 ...

Page 124

... C peripheral is working in the device 2 C output timing specifications—SCL and SDA Characteristic Min. Value 6 10 — 7 — peripheral is working in the device MPC5645S Microcontroller Data Sheet, Rev. 6 Max. Value Unit SpecID 2 — IP-Bus Cycle A12.1 2 — IP-Bus Cycle A12.2 — ns A12.3 2 — ...

Page 125

... The following notes apply to Table 70 • All data is based on a negative edge data launch from MPC5645S and a positive edge data capture, as shown in the timing diagrams in this section. The supply conditions, over a temperature range of -45 C to 125 C/150 C, are as follows: • ...

Page 126

... Delayed data capture edge with QSPI_SMPR=0x0000_000X Delayed data capture edge with QSPI_SMPR=0x0000_002X Delayed data capture edge with QSPI_SMPR=0x0000_004X Delayed data capture edge with QSPI_SMPR=0x0000_006X Tcq Figure 41. QuadSPI output timing Figure 42. QuadSPI input timing MPC5645S Microcontroller Data Sheet, Rev Freescale Semiconductor ...

Page 127

... Condition 100  termination between Pad_p and Pad_n Transition from 20% to 80% Transition from 20% to 80% — — — Max and min skew between clock and data pads MPC5645S Microcontroller Data Sheet, Rev. 6 Electrical characteristics Value Unit SpecID Min Typ Max 391 - 471 mV A14 ...

Page 128

... Package mechanical data 80% pad_p - pad_n 20% 5 Package mechanical data 128 Figure 44. Rise/fall transition, part 1 Figure 45. Rise/fall transition, part –V Figure 46. Illustration of tr, tf, and V MPC5645S Microcontroller Data Sheet, Rev Differential OD Freescale Semiconductor ...

Page 129

... LQFP Figure 47. LQFP176 mechanical drawing (part Freescale Semiconductor MPC5645S Microcontroller Data Sheet, Rev. 6 Package mechanical data 129 ...

Page 130

... Package mechanical data Figure 48. LQFP176 mechanical drawing (part 130 MPC5645S Microcontroller Data Sheet, Rev. 6 Freescale Semiconductor ...

Page 131

... Figure 49. LQFP176 mechanical drawing (part 5.2 208 LQFP Freescale Semiconductor MPC5645S Microcontroller Data Sheet, Rev. 6 Package mechanical data 131 ...

Page 132

... Package mechanical data Figure 50. LQFP208 mechanical drawing (part 132 MPC5645S Microcontroller Data Sheet, Rev. 6 Freescale Semiconductor ...

Page 133

... Figure 51. LQFP208 mechanical drawing (part Freescale Semiconductor MPC5645S Microcontroller Data Sheet, Rev. 6 Package mechanical data 133 ...

Page 134

... Package mechanical data Figure 52. LQFP208 mechanical drawing (part 134 MPC5645S Microcontroller Data Sheet, Rev. 6 Freescale Semiconductor ...

Page 135

... TEPBGA Figure 53. 416 TEPBGA mechanical drawing (part Freescale Semiconductor PRINT VERSION NOT TO SCALE MPC5645S Microcontroller Data Sheet, Rev. 6 Package mechanical data 135 ...

Page 136

... Package mechanical data Figure 54. 416 TEPBGA mechanical drawing (part 136 PRINT VERSION NOT TO SCALE MPC5645S Microcontroller Data Sheet, Rev Freescale Semiconductor ...

Page 137

... LU = 176 LQFP Pb-free LT = 208 LQFP Pb-free VU = 416 TEPBGA Pb-free Table 73. Table 73. Orderable part number summary Flash/SRAM 2 MB/ MB/ MB/64 KB MPC5645S Microcontroller Data Sheet, Rev. 6 Ordering information Tape and reel status R = Tape and reel (blank) = Trays Qualification status P = Pre-qualification M = Fully spec. qualified, general market flow S = Fully spec ...

Page 138

... Revision history 7 Revision history Revision (Date) 6 Initial public release. (08 Jun 2011) 138 Table 74. Revision history Description MPC5645S Microcontroller Data Sheet, Rev. 6 Freescale Semiconductor ...

Page 139

... Freescale Semiconductor THIS PAGE INTENTIONALLY BLANK MPC5645S Microcontroller Data Sheet, Rev. 6 139 ...

Page 140

... Freescale Semiconductor Literature Distribution Center 1-800-441-2447 or +1-303-675-2140 Fax: +1-303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com MPC5645S Document Number: Rev. 6 08/2011 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document ...

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