mpc8309 Freescale Semiconductor, Inc, mpc8309 Datasheet - Page 71

• Manufacturer Part Number: mpc8309
• Description: Powerquicc Ii Pro Integrated Communications Processor Family Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

23.6
The QUICC Engine PLL is controlled by the RCWL[CEPMF] and RCWL[CEPDF] parameters.
shows the multiplication factor encodings for the QUICC Engine PLL.
The RCWL[CEVCOD] denotes the QUICC Engine PLL VCO internal frequency as shown in
Freescale Semiconductor
01
10
11
RCWL[CEPMF]
00000–00001
MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0
01001–11111
0-1
00010
00100
00101
01000
00011
00110
00111
QUICC Engine PLL Configuration
RCWL[COREPLL]
0011
0011
0011
Core VCO frequency = core frequency  VCO divider. The VCO divider
(RCWL[COREPLL[0:1]]), must be set properly so that the core VCO
frequency is in the range of 400–800 MHz.
2-5
RCWL[CEVCOD]
RCWL[CEPDF]
Table 61. QUICC Engine PLL Multiplication Factors
Table 60. e300 Core PLL Configuration (continued)
00
01
10
11
0
0
0
0
0
0
0
0
0
Table 62. QUICC Engine PLL VCO Divider
6
0
0
0
core_clk : csb_clk Ratio
QUICC Engine PLL Multiplication Factor = RCWL[CEPMF]/
NOTE
3:1
3:1
3:1
(1 + RCWL[CEPDF)
Reserved
Reserved
 2
 3
 4
 5
 6
 7
 8
VCO Divider
Reserved
2
4
8
VCO Divider
 4
 8
 8
Table
Table 61
Clocking
62.
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