mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 226

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mc68hc912bd32

Manufacturer Part Number
mc68hc912bd32
Description
16-bit Device Composed Of Standard On-chip Peripherals
Manufacturer
Freescale Semiconductor, Inc
Datasheet
ATDCTL3 — ATD Control Register 3
Analog to Digital Converter
MC68HC912BD32 Rev 1.0
RESET:
Bit 7
0
0
6
0
0
AFFC — ATD Fast Flag Clear All
AWAI — ATD Stop in Wait Mode
ASCIE — ATD Sequence Complete Interrupt Enable
ASCIF — ATD Sequence Complete Interrupt
FRZ1, FRZ0 — Background Debug (Freeze) Enable (suspend module
operation at breakpoint)
Because the bias currents to the analog circuits are turned off, the
ATD requires a period of recovery time to stabilize the analog circuits
after setting the ADPU bit.
Cannot be written in any mode.
When debugging an application, it is useful in many cases to have the
ATD pause when a breakpoint is encountered. These two bits
determine how the ATD will respond when background debug mode
becomes active.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = ATD flag clearing operates normally (read the status register
1 = Changes all ATD conversion complete flags to a fast clear
0 = ATD continues to run when the MCU is in wait mode
1 = ATD stops to save power when the MCU is in wait mode
0 = Disables ATD interrupt
1 = Enables ATD interrupt on sequence complete
0 = No ATD interrupt occurred
1 = ATD sequence complete
5
0
0
before reading the result register to clear the associate CCF
bit).
sequence. Any access to a result register (ATD0–7) will cause
the associated CCF flag to clear automatically if it was set at
the time.
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Analog to Digital Converter
4
0
0
3
0
0
2
0
0
FRZ1
1
0
FRZ0
Bit 0
0
$0063
4-adc

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