mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 220

• Manufacturer Part Number: mc68hc912bd32
• Description: 16-bit Device Composed Of Standard On-chip Peripherals
• Manufacturer: Freescale Semiconductor, Inc

Byteflight™ Port
SBI Data Direction
Register (DDRSBI)
Initialization
DDRSBI
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Byteflight™ Module
MC68HC912BD32 Rev 1.0
HARDRESET
W
R
DDRSBI7
BIT 7
0
Figure 54 Port SBI Data Direction Register (DDRSBI)
DDRSBI7 – DDRSBI2 — Data Direction Port SBI Bits
To ensure correct operation, use the following initialization procedure:
DDRSBI6
BIT 6
The Port SBI5–2 pins are outputs, if PMEREN, PSLMEN, PERREN,
PROKEN and PSYNEN are set, regardless of their corresponding
Data Direction Bits. Only a hard reset will clear the register.
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Freescale Semiconductor, Inc.
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For More Information On This Product,
1 = Respective I/O pin is configured for output.
0 = Respective I/O pin is configured for input.
Enter the soft reset mode by setting the SFTRES bit (MCR)
Desired setting of module configuration register (MCR) – Master
or Slave select, MASTER bit
Desired setting of the FIFO Size register (FSIZR) – configure FIFO
size, FSIZ4:0 bits
Desired setting of time configuration registers (TCR1–TCR3)
Desired setting of the message buffer control registers
(BUFCTL15..0) – configure the buffers as transmit or receive
buffers
– enable/disable of the corresponding interrupt, IENA bits
Set FIFO acceptance register (FIDAC) and mask register
(FIDMR).
Exit the soft reset mode by resetting the SFTRES bit (MCR)
DDRSBI5
BIT 5
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0
Byteflight™ Module
DDRSBI4
BIT 4
0
DDRSBI3
BIT 3
0
DDRSBI2
BIT 2
0
BIT 1
0
0
BIT 0
0
0
50-sibus