mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 216

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mc68hc912bd32

Manufacturer Part Number
mc68hc912bd32
Description
16-bit Device Composed Of Standard On-chip Peripherals
Manufacturer
Freescale Semiconductor, Inc
Datasheet
FIFO Identifier
Acceptance
Register(FIDAC)
FIDAC
$xx0C
FIFO Identifier
Mask Register
(FIDMR)
FIDMR
$xx0D
Byteflight™ Module
MC68HC912BD32 Rev 1.0
HARDRESET
HARDRESET
W
W
R
R
NOTE:
NOTE:
FIDMR7*
FIDAC7*
BIT 7
BIT 7
0
0
Figure 48 FIFO Identifier Acceptance Register
The FIFO identifier acceptance register defines a user specified
sequence of bits with which the incoming identifier is compared. This
determines whether the message is accepted by the FIFO. Only a hard
reset will clear the register.
The FIDAC register can only be written if the SFTRES bit in the Module
Configuration register is set.
The identifier mask register specifies which of the corresponding bits in
the identifier acceptance register are relevant for acceptance filtering. A
cleared bit in this register indicates that the corresponding bit in the
identifier acceptance register must be the same as the incoming
identifier bit, before a match will be detected. The message will be
accepted by the FIFO if all such bits match. If a bit is set, it indicates that
the state of the corresponding bit in the identifier acceptance register will
not affect whether or not the message is accepted by the FIFO. Only a
hard reset will clear the register.
Bit description:
The FIDMR register can only be written if the SFTRES bit in the Module
Configuration register is set.
FIDMR6*
FIDAC6*
BIT 6
BIT 6
Figure 49 FIFO Identifier Mask Register
Freescale Semiconductor, Inc.
0
0
For More Information On This Product,
1 = Ignore corresponding acceptance register bit
0 = Match corresponding acceptance register bit
FIDMR5*
FIDAC5*
BIT 5
BIT 5
Go to: www.freescale.com
0
0
Byteflight™ Module
FIDMR4*
FIDAC4*
BIT 4
BIT 4
0
0
FIDMR3*
FIDAC3*
BIT 3
BIT 3
0
0
FIDMR2*
FIDAC2*
BIT 2
BIT 2
0
0
FIDMR1*
FIDAC1*
BIT 1
BIT 1
0
0
FIDMR0*
FIDAC0*
BIT 0
BIT 0
0
0
46-sibus

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