mc68hc908lb8 Freescale Semiconductor, Inc, mc68hc908lb8 Datasheet - Page 173

• Manufacturer Part Number: mc68hc908lb8
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

17.2 SIM Bus Clock Control and Generation
The bus clock generator provides system clock signals for the CPU and peripherals on the MCU. The
system clocks are generated from an incoming clock, BUSCLKX2, as shown in
17.2.1 Bus Timing
In user mode, the internal bus frequency is the oscillator frequency (BUSCLKX4) divided by four.
17.2.2 Clock Start-Up from POR
When the power-on reset module generates a reset, the clocks to the CPU and peripherals are inactive
and held in an inactive phase until after the 4096 BUSCLKX4 cycle POR time out has completed. The
RST pin is driven low by the SIM during this entire period. The IBUS clocks start upon completion of the
time out.
17.2.3 Clocks in Stop Mode and Wait Mode
Upon exit from stop mode by an interrupt or reset, the SIM allows BUSCLKX4 to clock the SIM counter.
The CPU and peripheral clocks do not become active until after the stop delay time out. This time out is
selectable as 4096 or 32 BUSCLKX4 cycles. See
Freescale Semiconductor
Addr.
$FE00
$FE01
$FE03
Break Flag Control Register
Register Name
Break Status Register
SIM Reset Status
Register (SRSR)
See page 183.
See page 184.
See page 185.
(BFCR)
(BSR)
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
POR:
OSCILLATOR
OSCILLATOR
Figure 17-2. SIM I/O Register Summary
1. Writing a 0 clears SBSW.
FROM
FROM
Bit 7
BCFE
POR
Figure 17-3. SIM Clock Signals
R
0
1
0
MC68HC908LB8 Data Sheet, Rev. 1
BUSCLKX4
BUSCLKX2
= Unimplemented
PIN
6
R
R
0
0
17.6.2 Stop
COP
5
R
R
0
0
÷
SIM COUNTER
2
SIM
ILOP
Mode.
4
R
R
R
0
0
GENERATORS
BUS CLOCK
= Reserved
SIM Bus Clock Control and Generation
ILAD
R
R
3
0
0
MODRST
Figure
R
R
2
0
0
17-3.
Note
SBSW
LVI
1
R
0
0
(1)
Bit 0
R
R
0
0
0
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