xe8802 Semtech Corporation, xe8802 Datasheet - Page 99

• Manufacturer Part Number: xe8802
• Description: Data Acquisition Soc With 16+10 Bit Zoomingadc? Embedded Risc Controller And Lcd Driver
• Manufacturer: Semtech Corporation

15.1 Features
The USRT implements a hardware support for software implemented serial protocols:
15.2 Overview
The USRT block supports software universal synchronous receiver and transmitter mode interfaces.
External lines S0 and S1 respectively correspond to clock line and data line. S0 is mapped to PB[4] and S1 to
PB[5] when the USRT block is enabled. It is independent of RegPBdir (Port B can be input or output). When
USRT is enabled, the configurations in port B for PB[4] and PB[5] are overwritten by the USRT configuration.
Internal pull-ups can be used by setting the PBPullup[5:4] bits.
Conditional edge detections are provided.
RegUsrtS1 can be used to read the S1 data line from PB[5] in receive mode or to drive the output S1 line PB[5] by
writing it when in transmit mode. It is advised to read S1 data when in receive mode from the RegUsrtBufferS1
register, which is the S1 value sampled on a rising edge of S0.
15.3 Register map
Block configuration registers:
© Semtech 2006
7-1
0
pos.
Control of two external lines S0 and S1 (read/write).
Conditional edge detection generates interrupts.
S0 rising edge detection.
S1 value is stored on S0 rising edge.
S0 signal can be forced to 0 after a falling edge on S0 for clock stretching in the low state.
S0 signal can be stretched in the low state after a falling edge on S0 and after a S1 conditional detection.
“0000000”
UsrtS1
RegUsrtS1
r
r/w
rw
XE8802 Sensing Machine Data Acquisition MCU
-
1 nresetglobal
Table 15-1: USRT registers
Table 15-2: RegUsrtS1
reset
RegUsrtBufferS1
RegUsrtEdgeS0
Register name
RegUsrtCond1
RegUsrtCond2
RegUsrtCtrl
RegUsrtS1
RegUsrtS0
15-2
with ZoomingADC™ and LCD driver
Unused
Write: data S1 written to pad PB[5]),
Read: value on PB[5] (not UsrtS1 value).
function
www.semtech.com