xe8802 Semtech Corporation, xe8802 Datasheet - Page 101

• Manufacturer Part Number: xe8802
• Description: Data Acquisition Soc With 16+10 Bit Zoomingadc? Embedded Risc Controller And Lcd Driver
• Manufacturer: Semtech Corporation

15.4 Interrupts map
15.5 Conditional edge detection 1
Condition 1 is satisfied when S0=1 at the falling edge of S1. The bit UsrtCond1 in RegUsrtCond1 is set when the
condition 1 is detected and the USRT interface is enabled (UsrtEnable=1). Condition 1 is asserted for both modes
(receiver and transmitter). The UsrtCond1 bit is read only and is cleared by all reset conditions and by writing any
data to its address.
Condition 1 occurrence also generates an interrupt on Irq_cond1.
15.6 Conditional edge detection 2
Condition 2 is satisfied when S0=1 at the rising edge of S1. The bit UsrtCond2 in RegUsrtCond2 is set when the
condition 2 is detected and the USRT interface is enabled. Condition 2 is asserted for both modes (receiver and
transmitter). The UsrtCond2 bit is read only and is cleared by all reset conditions and by writing any data to its
address.
Condition 2 occurrence also generates an interrupt on Irq_cond2.
© Semtech 2006
S1
S0
S1
S0
Irq_cond2
Irq_cond1
interrupt source
XE8802 Sensing Machine Data Acquisition MCU
Table 15-9: Interrupts map
RegIrqMid(7)
RegIrqMid(6)
Figure 15-1: Condition 1
Figure 15-2: Condition 2
default mapping in the interrupt manager
15-4
with ZoomingADC™ and LCD driver
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